參數(shù)資料
型號: MC56F8245MLD
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 60 MHz, MICROCONTROLLER, PQFP44
封裝: 10 X 10 MM, 1.40 MM HEIGHT, 0.80 MM PITCH, ROHS COMPLIANT, PLASTIC, MS-026BCB, LQFP-44
文件頁數(shù): 68/88頁
文件大?。?/td> 4050K
代理商: MC56F8245MLD
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Specifications
Freescale Semiconductor
70
2. Parasitic capacitance due to the chip bond pad, ESD protection devices, and signal routing: 2.04 pF
3. 8 pF noise damping capacitor
4. Sampling capacitor at the sample and hold circuit. Capacitor C1 is normally disconnected from the input and is only
connected to it at sampling time: Cgain = 1.4 pF for x1 gain, 2.8 pF for x2 gain, and 5.6 pF for x4 gain.
5. S1 and S2 switch phases are non-overlapping and operate at the ADC clock frequency.
Figure 31. Equivalent Circuit for A/D Loading
7.26 Digital-to-Analog Converter (DAC) Parameters
Table 42. DAC Parameters
Parameter
Conditions/Comments
Symbol
Min
Typ
Max
Unit
DC Specifications
Resolution
12
12
bits
Settling time
At output load
RLD = 3 KΩ
CLD = 400 pf
TBD
2
S
Power-up time
Time from release of PWRDWN
signal until DACOUT signal is
valid
tDAPU
11
S
Accuracy
Integral non-linearity1
Range of input digital words:
410 to 3891 ($19A - $F33)
5% to 95% of full range
INL
+/- 3
+/- 8.0
LSB2
Differential non-linearity1
Range of input digital words:
410 to 3891 ($19A - $F33)
5% to 95% of full range
DNL
+/- 0.8
+/- 1.0
LSB2
Monotonicity
> 6 sigma monotonicity,
< 3.4 ppm non-monotonicity
guaranteed
Offset error1
Range of input digital words:
410 to 3891 ($19A - $F33)
5% to 95% of full range
VOFFSET
+/- 25
+/- 40
mV
Gain error1
Range of input digital words:
410 to 3891 ($19A - $F33)
5% to 95% of full range
EGAIN
+/- .5
+/- 1.5
%
DAC Output
Output voltage range
Within 40 mV of either VREFLX or
VREFHX
VOUT
VREFLX
+0.04V
—VREFHX
- 0.04V
V
AC Specifications
Signal-to-noise ratio
SNR
TBD
dB
Spurious free dynamic
range
SFDR
TBD
dB
Effective number of bits
ENOB
Bits
S1
S2
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