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參數(shù)資料
| 型號(hào)： | MC54HC4353J |
| 廠商： | MOTOROLA INC |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Analog Multiplexers/Demultiplexers with Address Latch |
| 中文描述： | TRIPLE 2-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP20 |
| 封裝： | CERAMIC, DIP-20 |
| 文件頁(yè)數(shù)： | 9/13頁(yè) |
| 文件大小： | 477K |
| 代理商： | MC54HC4353J |
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MC54/74HC4351 MC54/74HC4353
High–Speed CMOS Logic Data
DL129 — Rev 6
9
MOTOROLA
Figure 12a. Propagation Delay, Latch Enable to
Analog Out
ON/OFF
20
VCC
CL*
*Includes all probe and jig capacitance.
LATCH ENABLE
TEST
POINT
OFF/ON
VCC
ANALOG I/O
COMMON O/I
Figure 12b. Propagation Delay, Test Set–Up
Latch Enable to Analog Out
CHANNEL
SELECT
LATCH
ENABLE 2
COMMON O/I
GND
VCC
GND
VCC
50%
50%
50%
90%
10%
tsu
th
tf
tr
tw
tPLH,
tPHL
8
9
10
7
VCC
CHANNEL SELECT
11
Figure 13. Crosstalk Between Any Two
Switches, Test Set–Up
RL
ON
20
CL*
*Includes all probe and jig capacitance.
OFF
RL
VIS
RL
CL*
VOS
fin
0.1
μ
F
VCC
dB
METER
8
9
10
7
RL
VCC
VEE
Figure 14. Power Dissipation Capacitance,
Test Set-Up
ON/OFF
20
VCC
CHANNEL SELECT
NC
OFF/ON
VCC
11
VCC
ANALOG I/O
COMMON O/I
A
8
9
10
7
VCC
VEE
Figure 15a. Total Harmonic Distortion, Test Set-Up
ON
20
VCC
0.1
μ
F
CL*
fin
RL
TO
DISTORTION
METER
*Includes all probe and jig capacitance.
VOS
VIS
8
9
10
7
VCC
VEE
Figure 15b. Plot, Harmonic Distortion
0
–10
–20
–30
–40
–50
1.0
2.0
3.125
FREQUENCY (kHz)
d
–60
–70
–80
–90
FUNDAMENTAL FREQUENCY
DEVICE
SOURCE
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