參數(shù)資料
型號(hào)： MC44BS374CAEFR2
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 18/34頁(yè)
文件大?。?/td> 0K
描述： IC AUDIO/VIDEO MODULATOR 16-SOIC
標(biāo)準(zhǔn)包裝： 1
類(lèi)型： NTSC/PAL 調(diào)制器
應(yīng)用： 音頻/視頻，VCR，機(jī)頂盒
安裝類(lèi)型： 表面貼裝
封裝/外殼： 16-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 16-SOIC N
包裝： 剪切帶 (CT)
其它名稱(chēng)： MC44BS374CAEFR2CT
High Speed I2C Compatible Bus
MC44BS374CA Technical data
16.3 Level Definitions
SDA/SCL high and low levels are designed to be compatible with 0-5V and 0-3.3V SDA / SCL signals.
Figure 10. SDA/SCL Levels
16.4 High Speed I2C Compatible Bus Format
Figure 11. I2C Bus Timing
16.5 I2C Write Mode Format and Bus Receiver
The bus receiver operates the I2C compatible data format. The chip address (I2C bus) is as follows.
In write mode, each ninth data bit (bits 9, 18, 27, 36, and 45) is an acknowledge bit (ACK) during which
the MCU sends a logic 1 and the Modulator circuit answers on the data line by pulling it low. Besides the
chip address, the circuit needs two or four data bytes for operation. The following sequences of data bytes
are the permitted incoming information:
Table 8. Chip Address (I2C Bus)
1 1 0 0 1 0 1 0 (ACK) = $CA (hex) in write mode
Table 9. Permitted Data Bytes (Incoming Information)
Example 1
STA
CA
C1
C0
STO
Example 2
STA
CA
FM
FL
STO
Example 3
STA
CA
C1
C0
FM
FL
STO
Example 4
STA
CA
FM
FL
C1
C0
STO
Note:
SDA
...
0V
Vcc
Vih
Vil
dead band
1
2
3
4
5
6
7
8
9 10
14
11 12 13
45
44
15
19
16 17 18
STA
Chip Address ($CA)
ACK
First Data Byte (C1 or FM)
Data
ACK
Stop
SCL
SDA
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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