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參數(shù)資料
| 型號： | MC44605P |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | RW-S Series - Econoline Regulated DC-DC Converters; Input Voltage (Vdc): 05V; Output Voltage (Vdc): 05V; Power: 2W; DIP24 Low Profile Miniature Package; 1kVDC Isolation; Feedback Regulated Output; 2:1 Wide Range Voltage Input; Continuous Short Circuit Protection; Less than 7mm Height; SMD Pinning Option; Efficiency to 87% |
| 中文描述： | 0.75 A SWITCHING CONTROLLER, 250 kHz SWITCHING FREQ-MAX, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 17/20頁 |
| 文件大小： | 328K |
| 代理商： | MC44605P |
MC44605
http://onsemi.com
17
Consequently, by replacing VOHD by 2.5 V (threshold
value) in the last equation, the value ROHD to use, can be
deducted:
ROHD
2.5
Rref
Rdson
(pon)max
3
Γ
OHD
R2
S
where: (pon)max are the maximum on time losses
that are
acceptable.
Disabling Block Section
This section consists of a “definitive inhibition latch”
(directly supplied by the Vcc) that disables the output (the
output is forced to zero).
In effect, this block aims at definitively disabling the
circuit when one of the following faults is detected:
— a Winding Short Circuit
— too high synchronization pulses
— a too high input power
— a too high power switch (MOSFET) heating
The signals corresponding to these faults are high when a
fault is detected (for instance, when the input power is
detected as too high, DisMPL is high).
When one (or several) of these four faults is detected, a
current source charges Cext (with a certain duty cycle) and
when its voltage becomes higher than Vref, the definitive
inhibition latch is activated. Thus, the circuit gets
definitively disabled after a delay depending on Cext.
According to the detected fault, the current that charges
Cext is not the same:
The typical values are:
— 260
μ
A for EHTOVP and WSCD
— 8.5
μ
A for OHD and MPL
when Rref is equal to 10 k
.
Figure 15. Disabling Block
2.5 V
DisOHD
DisMPL
R
e
C
e
Vref
3.4% Iref
MC44605
Pin 12
1
0
Definitive
Inhibition
Latch
VCC
Output
Buffer
Vref
104% Iref
E.H.T.OVP
QS
R
VWSCD
Delay
4 S
1
0
This latch is reset when the Vcc falls down to about 3 V.
In this case, if a new start up is performed, the circuit will
work normally (until this fault or another one is detected).
Practically, to re–start after a fault has shutdown the
circuit, the converter must be turned off for a time long
enough to enable the Vcc capacitor discharge (repair time...).
Note:
As VWSCD is generally a really narrow pulse, it is
necessary to add a latch and a delay to build a 4
μ
s width
pulse when VWSCD becomes high.
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