參數(shù)資料
型號(hào): MC44604
廠商: ON SEMICONDUCTOR
英文描述: High Safety Pulsed Mode Stanby GreenLine PWM Controller
中文描述: 高安全性脈沖模式Stanby二七二三六七六七PWM控制器
文件頁(yè)數(shù): 17/24頁(yè)
文件大小: 341K
代理商: MC44604
MC44604
http://onsemi.com
17
Figure 35. Different Possible Uses of Pin 11
Pin 11
RI
RI
R Connected to
Pin 11
I = 0.4 Iref
VZ
VZ
C
C // R
τ
= RC
In any case (particularly if no external component is
connected to pin 11), an internal zener diode (DZ, refer to
Figure 34) is able to clamp the pin 11 voltage to a value VZ
that is higher than the oscillator value and so, that results in
no max duty cycle limitation.
As soon as Vdisable1 is detected, a signal UVLO1 is
generated until the VCC voltage falls down to Vdisable2
(refer to the undervoltage lockout section paragraph).
During the delay between the disable 1 and the disable 2,
using a transistor controlled by UVLO1, the pin 11 voltage
is made equal to zero in order to make the max duty cycle and
soft–start arrangement ready to work for the next restart.
In standby mode, this block is inhibited in order not to
interfere with the Standby Current Set.
Protection
The MC44604 can ensure a high converter reliability
thanks to the protection it offers.
Demagnetization Detection
(Refer to Demag §)
Foldback
As depicted in Figure 28, the foldback input (pin 5)
enables to reduce the maximum VCS value that would be
equal to 1 typically, if there was no foldback action. Finally,
the foldback arrangement is a programmable peak current
limitation.
Figure 36. Foldback Characteristic
Vout
VO
Nominal
VCC
Vdisable2
Ipk max
New Startup
Sequence Initiated
Iout
Overload
It could be used as a soft–start (by connecting to pin 5, a
gradually increasing voltage) but in fact, it has been
designed to provide the system with an effective overload
protection.
Indeed, as the output load gradually increases, the
required converter peak current becomes higher and so,
VCS grows up till it reaches its maximum value (normally,
VCS max = 1 V).
Then if the output load keeps on increasing, the system is
not able to supply enough energy to maintain the output
regulation. Consequently, the decreasing output can be used
to apply a voltage that diminishes to a value lower than 1 V,
to pin 5, in order to limit the maximum peak current. In this
way, the well known foldback characteristic is obtained
(refer to Figure 36).
The foldback action can be inhibited by connecting the pin
5 to VCC.
Overvoltage Protection
The overvoltage arrangement consists of a comparator
that compares the pin 6 voltage to Vref (2,5 V) (refer to
Figure 37).
Figure 37. Overvoltage Protection
VCC
Vref
0
T
2.5 V
(Vref)
2.5 V
5.0
μ
s
VOVP out
2.0
μ
s
(If VOVP out = 1.0,
the Output is Disabled)
In
Out
Delay
τ
Enable
COVLO
Delay
In
Out
τ
11.6 K
2 K
VOVP
Pin 6
If no external component is connected to pin 6, the
comparator non inverting input voltage is nearly equal to:
2 k
11,6 k
2 k
VCC
So, the comparator output is high when:
2 k
11,6 k
2 k
VCC
2,5 V
VCC
17 V
A delay latch (2
μ
s) is incorporated in order to only take
into account the overvoltages that last at least 2
μ
s.
If this condition is achieved, VOVPout the delay latch
output becomes high and as this level is brought back to the
input through an OR gate, VOVPout remains high (and so,
the IC output is disabled) until Vref is disabled.
Consequently when an overvoltage longer than 2
μ
s is
detected, the output is disabled until a new circuit restart.
The VCC is connected when once the circuit has
started–up in order to limit the circuit start–up consumption
(T is switched on when once Vref has been generated).
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