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| 型號(hào)： | MC34280FTB |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 電源管理 |
| 英文描述： | Power Supply & Management IC for Handheld Electronic Products |
| 中文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP32 |
| 封裝： | LQFP-32 |
| 文件頁數(shù)： | 15/20頁 |
| 文件大?。?/td> | 380K |
| 代理商： | MC34280FTB |
MC34280
http://onsemi.com
15
DETAILED OPERATING DESCRIPTION (Cont’d)
Auxiliary voltage adjustment
The VAUX voltage can be adjusted by the microprocessor
control signals, namely, VAUXCON and VAUXADJ. The
control signal pattern is shown in Figure 4. The input truth
table is shown in Figure 25.
When VAUXEN is LOW, the Auxiliary Regulator is shut
down, only the counter content is retained. The initial
counter content is mid–range of 6–bit.
At the rising edge of VAUXCON, if VAUXADJ is LOW
(/ HIGH), each following VAUXADJ pulse enclosed by the
VAUXCON pulse packet increments (/ decrements) the
6–bit counter. At the falling edge of VAUXCON, the counter
content is then latched to a 6–bit DAC and is converted to a
voltage level of VAUXREF between 1.1V and 2.2V.
At the falling edge of VAUXCON, if VAUXADJ is HIGH,
the counter content will be reset to mid–range (1.65V). This
is also the default setting just after power–ON reset is
removed.
The 6–bit DAC converts the counter content to voltage
level ranging from 1.1 to 2.2V, so there are altogether 64
levels, and each voltage step is 17mV. When the counter
content reaches its maximum or minimum, further pulse of
VAUXADJ will be disregarded, until counting direction is
changed.
Power–ON Reset
The Power–ON Reset block accepts external active HIGH
ENABLE signal to activate the IC after battery is plugged in.
During the startup period (see Figure 2), the internal startup
circuitry is enabled to pump up VMAIN to a certain voltage
level, which is the user–defined VMAIN output level minus
an offset of 0.15V. The internal power–on reset signal is then
disabled to activate the main regulator and conditionally the
auxiliary regulator. Meanwhile, the startup circuitry will be
shut down. The Power–ON Reset block also starts to charge
up the external capacitor tied from Pin PDELAY to ground
with precise constant current. As the Pin PDELAY’s voltage
reaches an internal set threshold, Pin PORB will go HIGH
to awake the microprocessor. And,
TPOR
1.22
0.5
Cpor
RIref (S)
From Figure 3, if, by any chance, VMAIN is dropped
below the user–defined VMAIN output level minus 0.5V,
PORB will go LOW to indicate the OUTPUT LOW
situation. And, the IC will continue to function until the
VMAIN is dropped below 2V.
Low–Battery–Detect
The Low–Battery–Detect block is actually a voltage
comparator. Pin LOWBAT is LOW, if the voltage of external
Pin LOWBATSEN is lower than 0.85V internal reference.
The IC will neglect this warning signal. Pin LOWBAT will
become HIGH, if the voltage of external Pin LOWBATSEN
is recovered to more than 1.1V. From Figure 1, with external
resistors
RLBa
and
Low–Battery–Detect can be adjusted based on the equations
below.
RLBb,
thresholds
of
VLOBAThigh
1.1
1
RLBa
RLBb
(V)
VLOBATlow
0.85
1
RLBa
RLBb
(V)
VAUXEN
VAUXCON
VAUXADJ
RESULT
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á
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0
X
Figure 25. Auxiliary Voltage Control Input Truth Table
X
Hold the counter content
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1
0
X
0
1
Hold the counter content
Set ”countup” flag HIGH
Set ”countup” flag LOW
1
1
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á
á
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á
VAUXREF voltage level (1.65V)
á
Reset the counter to mid–range, then convert the counter content to
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