參數(shù)資料
型號: MC33887
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: 5.0 A H-Bridge with Load Current Feedback(帶本地電流反饋功能的5.0A H橋接器)
中文描述: 5.0的H -橋的負載電流反饋(帶本地電流反饋功能的5.0AH橋接器)
文件頁數(shù): 19/28頁
文件大小: 760K
代理商: MC33887
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33887
19
FUNCTIONAL TERMINAL DESCRIPTION
PGND and AGND
Power and analog ground terminals. The power and analog
ground terminals should be connected together with a very low
impedance connection.
V+
V+ terminals are the power supply inputs to the device. All V+
terminals must be connected together on the printed circuit
board with as short as possible traces offering as low
impedance as possible between terminals.
V+ terminals have an undervoltage threshold. If the supply
voltage drops below a V+ undervoltage threshold, the output
power stage switches to a tri-state condition and the fault status
flag is SET and the Fault Status terminal voltage switched to a
logic LOW. When the supply voltage returns to a level that is
above the threshold, the power stage automatically
resumes
normal operation according to the established condition of the
input terminals and the fault status flag is automatically reset
logic HIGH.
Fault Status (FS)
This terminal is the device fault status output. This output is
an active LOW open drain structure requiring a pull-up resistor
to 5.0 V. Refer to
Table 1, Truth Table
, page 17.
IN1, IN2, D1, and D2
These terminals are input control terminals used to control
the outputs. These terminals are 5.0 V CMOS-compatible
inputs with hysteresis. The IN1 and IN2 independently control
OUT1 and OUT2, respectively. D1 and
D2
are complementary
inputs used to tri-state disable the H-Bridge outputs.
When either D1 or
D2
is SET (D1 = logic HIGH or
D2
= logic
LOW) in the disable state, outputs OUT1 and OUT2 are both tri-
state disabled; however, the rest of the device circuitry is fully
operational and the supply I
Q(
standby)
current is reduced to a few
milliamperes. Refer to
Table 1, Truth Table
, and
STATIC
ELECTRICAL CHARACTERISTICS
table, page 8.
OUT1 and OUT2
These terminals are the outputs of the H-Bridge with
integrated output FET body diodes. The bridge output is
controlled using the IN1, IN2, D1, and
D2
inputs. The outputs
have active current limiting above 6.5 A. The outputs also have
thermal shutdown (tri-state latch-OFF) with hysteresis as well
as short circuit latch-OFF protection.
A disable timer (time t
b
) incorporated to detect currents that
are higher than current limit is activated at each output
activation to facilitate hard short detection (see
Figure 7
,
page 12).
C
CP
Charge pump output terminal. A filter capacitor (up to 33 nF)
can be connected from the C
CP
terminal and PGND. The device
can operate without the external capacitor, although the C
CP
capacitor helps to reduce noise and allows the device to
perform at maximum speed, timing, and PWM frequency.
EN
The EN terminal is used to place the device in a sleep mode
so as to consume very low currents. When the EN terminal
voltage is a logic LOW state, the device is in the sleep mode.
The device is enabled and fully operational when the EN
terminal voltage is logic HIGH. An internal pull-down resistor
maintains the device in sleep mode in the event EN is driven
through a high impedance I/O or an unpowered microcontroller,
or the EN input becomes disconnected.
FB
The device has a feedback output (FB) for “real time”
monitoring of H-Bridge high-side current to facilitate closed-
loop operation for motor speed and torque control.
The FB terminal provides current sensing feedback of the
H-Bridge high-side drivers. When running in the forward or
reverse direction, a ground referenced 1/375th (0.00266) of
load current is output to this terminal. Through the use of an
external resistor to ground, the proportional feedback current
can be converted to a proportional voltage equivalent and the
controlling microcontroller can “read” the current proportional
voltage with its analog-to-digital converter (ADC). This is
intended to provide the user with motor current feedback for
motor torque control. The accuracy is ±20% at load currents
<1.5 A and ±10% at load currents >1.5 A.
If PWM-ing is implemented using the disable terminal inputs
(either D1 or
D2
), a small filter capacitor (1.0
μ
F or less) may be
required in parallel with the external resistor to ground for fast
spike suppression.
F
Freescale Semiconductor, Inc.
Go to: www.freescale.com
n
.
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