參數(shù)資料
型號(hào): MC33886VWR2
廠商: Motorola, Inc.
英文描述: 5.0 A H BRIDGE
中文描述: 5.0阿橋
文件頁(yè)數(shù): 16/20頁(yè)
文件大?。?/td> 637K
代理商: MC33886VWR2
33886
16
Go to: www.freescale.com
OUT1 and OUT2
These terminals are the outputs of the H-Bridge with
integrated output FET body diodes. The bridge output is
controlled using the IN1, IN2, D1, and D2 inputs. The outputs
have active current limiting above 6.5 A. The outputs also have
thermal shutdown (tri-state latch-OFF) with hysteresis as well
as short circuit latch-OFF protection.
A disable timer (time t
b
) incorporated to detect currents that
are higher than active current limit is activated at each output
activation to facilitate detecting hard output short conditions
(see
Figure 7
, page 9).
C
CP
Charge pump output terminal. A filter capacitor (up to 33 nF)
can be connected from the
C
CP
terminal and PGND. The device
can operate without the external capacitor, although the
C
CP
capacitor helps to reduce noise and allows the device to
perform at maximum speed, timing, and PWM frequency.
PERFORMANCE FEATURES
Short Circuit Protection
If an output short circuit condition is detected, the power
outputs tri-state (latch-OFF) independent of the input (IN1 and
IN2) states, and the fault status output flag is set logic Low. If
the D1 input changes from logic High to logic Low, or if the
D2
input changes from logic Low to logic High, the output bridge
will become operational again and the fault status flag will be
reset (cleared) to a logic High state.
The output stage will always switch into the mode defined by
the input terminals (IN1, IN2, D1, and D2), provided the device
junction temperature is within the specified operating
temperature.
Active Current Limiting
The maximum current flow under normal operating
conditions is internally limited to I
LIM
(5.2 A to 7.8 A). When the
maximum current value is reached, the output stages are tri-
stated for a fixed time (t
a
) of 20
μ
s typical. Depending on the
time constant associated with the load characteristics, the
current decreases during the tri-state duration until the next
output ON cycle occurs (see
Figures 7
and
13
, page 9 and
page 12, respectively).
The current limiting threshold value is dependent upon the
device junction temperature. When -40
°
C < T
J
< 160
°
C, I
LIM
is
between 5.2 A and 7.8 A. When T
J
exceeds 160
°
C, the
I
LIM
current decreases linearly down to 2.5 A typical at 175
°
C.
Above 175
°
C the device overtemperature circuit detects T
LIM
and overtemperature shutdown occurs (see
Figure 5
, page 8).
This feature allows the device to remain operational for a longer
time but at a regressing output performance level at junction
temperatures above 160
°
C.
Overtemperature Shutdown and Hysteresis
If an overtemperature condition occurs, the power outputs
are tri-state (latched-OFF) independent of the input signals and
the fault status flag is set logic Low.
To reset from this condition, D1 must change from logic High
to logic Low, or D2 must change from logic Low to logic High.
When reset, the output stage switches ON again, provided that
the junction temperature is now below the overtemperature
threshold limit minus the hysteresis.
Note
Resetting from the fault condition will clear the fault
status flag.
Main Differences Compared to MC33186DH1
COD terminal has been removed. Terminal 8 is now a Do
Not Connect (DNC) terminal.
Terminal 20 is no longer connected in the 20 HSOP
package. It is now a DNC terminal.
R
DS(ON)
max at T
J
= 150°C is now 225 m
per each output
transistor.
Maximum temperature operation is now 160°C, as
minimum thermal shutdown temperature has increased.
Current regulation limiting foldback is implemented above
160°C T
J
.
Thermal resistance junction to case has been increased
from ~2.0°C/W to ~5.0°C/W.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
n
.
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