參數(shù)資料
型號： MC33742SDWR2
廠商： Motorola, Inc.
元件分類： CAN
英文描述： System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver
中文描述： 系統(tǒng)基礎芯片的增強型（SBC）的高速CAN收發(fā)器
文件頁數(shù)： 26/52頁
文件大小： 1087K
代理商： MC33742SDWR2
33742
26
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
Figure 12. Entering Debug Mode
When the 33742 is in debug mode and has been set into
Stop Debug or Sleep, a wake-up causes the 33742 to enter the
Normal Request mode for 350 ms. To avoid having the 33742
generate a reset (enter Reset mode), the desired next debug
mode (Normal Debug or Standby Debug) should be configured
within the 350 ms time period of the Normal Request mode.
To avoid entering debug mode after a power-up, first read
the BATFAIL bit (MCR read) and write 0000 into the MCR
register.
Figure 13
below and
Figure 14
, page 27, show the detailed
operation of the 33742 once the debug mode has been
selected.
Figure 13. Transitions to Enter Debug Modes
V
SUP
SPI
MCR (Step 4)
BATFAIL
V
DD
Debug Mode
MCR (Step 5)
SPI: Read BATFAIL
MCR (Step 6)
33742/33742S in Debug mode.
No Watchdog
33742/33742S not in Debug mode.
Watchdog ON
TIM1(Step 3)
Normal Request
Standby Debug
SPI: MCR (0000) and Normal Debug
Normal
W
T
Reset
Reset Counter
(3.4 ms) Expired
Watchdog: Timeout 350 ms
Normal Debug
SPI: MCR (0000) and Standby Debug
Power
Down
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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