參數(shù)資料
型號(hào)： MC33742
廠商： Motorola, Inc.
元件分類： CAN
英文描述： System Basis Chip (SBC) with Enhanced High-Speed CAN Transceiver
中文描述： 系統(tǒng)基礎(chǔ)芯片的增強(qiáng)型（SBC）的高速CAN收發(fā)器
文件頁(yè)數(shù)： 21/52頁(yè)
文件大小： 1087K
代理商： MC33742
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33742
21
In Normal Request mode, the V
DD
regulator is ON, the V2
regulator is OFF, and the
RST
terminal is HIGH. As soon as the
33742 enters the Normal Request mode, an internal 350 ms
timer is started (parameter t
NRTOUT
). During these 350 ms, the
MCU of the application must address the 33742 via SPI and
configure the TIM1 subregister to select the watchdog period.
This is the condition for the 33742 to stop the 350 ms timer and
go into the Normal or Standby mode and set the watchdog timer
according to the configuration.
Normal Request Entered and No Watchdog Configuration
Occurs
If the Normal Request mode is entered after the 33742
powers up or after a wake-up from Stop mode, and if no
watchdog configuration occurs while the 33742 is in Normal
Request mode, the 33742 goes into Reset mode after the
350 ms time period has expired before again going into Normal
Request mode. If no watchdog configuration is achieved, the
33742 alternatively goes from Normal Request mode, to Reset
mode, to Normal Request mode, and so on.
If the Normal Request mode is entered after a wake-up from
Sleep mode, and if no watchdog configuration occurs while the
33742 is in Normal Request mode, the 33742 goes back to
Sleep mode.
Normal Mode
In Normal mode, both the V
DD
and V2 regulators are ON.
This corresponds to the normal application operation. All
functions are available in this mode (watchdog, wake-up input
reading through SPI, HS activation, and CAN communication).
Watchdog software is running and must be periodically cleared
through SPI.
Standby Mode
In Standby mode, only the V
DD
regulator is ON. The V2
regulator is turned OFF by disabling the V2CTRL terminal. The
CAN interface is not able to send messages. If a CAN message
is received, the CANWU bit is set. Other functions available are
L0:L3 input reading through SPI and HS activation. Watchdog
is running.
Sleep Mode
In Sleep mode, the V
DD
and V2 regulators are OFF. Current
from the V
SUP
terminal is reduced. In Sleep mode, the 33742
can be awakened by L0:L3 inputs, by cyclic sense of the L0:L3
inputs, by the automatic forced wake-up timer, and from the
CAN physical interface receiving an incoming CAN message.
When a wake-up occurs, the 33742 goes first into the Reset
mode before entering Normal Request mode.
Stop Mode
The V2 regulator is turned OFF by disabling the V2CTRL
terminal. The V
DD
regulator is activated in a special low power
mode, allowing the delivery of a few mA. The objective is to
maintain power on the MCU of the application while the MCU is
turned into power-saving condition (i.e, Stop or Wait modes). In
Stop mode, the device supply current from V
PWR
is very low.
When the application is in Stop mode (both MCU and
33742), the application can wake up from either the 33742 side
(for example, cyclic sense, forced wake-up, CAN message,
wake-up inputs, and overcurrent on V
DD
) or the MCU side (key
wake-up, etc.).
Stop mode is always selected by SPI. In Stop mode, the
watchdog software may be either running or not running
depending upon selection by SPI (Reset Control Register
[RCR], bit WDSTOP). To clear the watchdog if it is running, the
33742 must be awakened by the
CS
terminal (SPI wake-up). In
Stop mode, the 33742 wake-up capability is identical to that in
Sleep mode, with the addition of
CS
and V
DD
overcurrent wake-
up. Refer to
Table 2
, page 20.
Application Wake-Up from 33742 Side
When the application is in Stop mode, it can wake up from
the 33742 side. When a wake-up is detected by the 33742 (for
example, CAN, wake-up input), the 33742 turns itself into
Normal Request mode and generates an interrupt pulse at the
INT
terminal.
Application Wake-Up from MCU Side
When the application is in Stop mode, the wake-up event
may come from the MCU side. In this case the MCU signals to
the 33742 by a LOW-to-HIGH transition on the
CS
terminal.
Then the 33742 goes into Normal Request mode and generates
an interrupt pulse at the
INT
terminal.
Stop Mode Current Monitor
If the V
DD
output current exceeds an internal threshold
(I
DDS-WU
), the 33742 goes automatically into Normal Request
mode and generates an interrupt at the
INT
terminal. The
interrupt is not maskable and the INTR register will have no flag
set.
Interrupt Generation When Wake-Up from Stop Mode
When the 33742 wakes up from Stop mode, it first enters the
Normal Request mode before generating a pulse (10
μ
s typical)
on the
INT
terminal. These interrupts are not maskable, and the
wake-up event can be read through the SPI registers, CANWU
bit in the CAN Register (CANR), and LCTRx bit in the Wake-Up
Register (WUR). In case of wake-up from Stop mode
overcurrent or from forced wake-up, no bit is set. After the
INT
pulse, the 33742 accepts SPI command after a time delay
(t
S-1STSPI
).
Watchdog Software in Stop Mode
If watchdog is enabled, the MCU has to wake up
independently of the 33742 before the end of the 33742
watchdog time. In order to do this, the MCU must signal the
wake-up to the 33742 through the SPI wake-up (
CS
activation).
The 33742 then wakes up and jumps into the Normal Request
mode. The MCU has to configure the 33742 to go to either
Normal or Standby mode. The MCU can then decide to go back
to the Stop mode.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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