參數(shù)資料
型號(hào): MC33395DWB
廠商: MOTOROLA INC
元件分類: 運(yùn)動(dòng)控制電子
英文描述: BRUSHLESS DC MOTOR CONTROLLER, PDSO32
封裝: PLASTIC, SOIC-32
文件頁(yè)數(shù): 2/16頁(yè)
文件大小: 351K
代理商: MC33395DWB
33395
MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
10
SYSTEM /APPLICATION INFORMATION
INTRODUCTION
The 33395 and 33395T devices are designed to provide the
necessary drive and control signal buffering and amplification to
enable a DSP or MCU to control a three-phase array of power
MOSFETs such as would be required to energize the windings
of powerful brushless DC (BLDC) motors. It contains built-in
charge pump circuitry so that the MOSFET array may consist
entirely of N-Channel MOSFETs. It also contains feedback
sensing circuitry and control circuitry to provide a robust overall
motor control design.
FUNCTIONAL DESCRIPTION
Gate Drive Circuits
The gate drive outputs (GDH1, GDH2, etc.) supply the peak
currents required to turn ON and hold ON the MOSFETs, as
well as turn OFF and hold OFF the MOSFETs.
Charge Pump
The current capability of the charge pump is sufficient to
supply the gate drive circuit’s demands when PWM’ing at up to
28 kHz. Two external charge pump capacitors and a reservoir
capacitor are required to complete the charge pump’s circuitry.
Charge reservoir capacitance is a function of the total
MOSFET gate charge (QG) gate drive voltage level relative to
the source (VGS) and the allowable sag of the drive level during
the turn-on interval (VSAG). CRES can be expressed by the
following formula:
For example, for QG = 60 nC, VGS = 14 V, VSAG = 0.2 V:
Proper charge pump capacitance is required to maintain,
and provide for, adequate gate drive during high demand turn-
ON intervals. Use the following formula to determine values for
CP1 and CP2:
For example, for the above determination of CRES = 0.15 F:
By averaging these two values, the proper CPn value can be
determined:
CP1 and CP2 =(0.0075 F + 0.015 F) ÷ 2 = 0.01 F
Thermal Shutdown Function
The device has internal temperature sensing circuitry which
activates a protective shutdown function should the die reach
excessively elevated temperatures. This function effectively
limits power dissipation and thus protects the device.
Overvoltage Shutdown Function
When the supply voltage (VIGN) exceeds the specified over-
voltage shutdown level, the part will automatically shut down to
protect both internal circuits as well as the load. Operation will
resume upon return of VIGN to normal operating levels.
Low Voltage Reset Function
When the logic supply voltage (VDD) drops below the
minimum voltage level or when the part is initially powered up,
this function will turn OFF and hold OFF the external MOSFETs
until the voltage increases above the minimum voltage level
required for normal operation.
Control Logic
The control logic block controls when the low-side and high-
side drivers are enabled. The logic implements the Truth Table
found in the specification and monitors the M0, M1, PWM, CL,
OT, OV, LSE, and HSE terminals. Note that the drivers are
enabled 3
s after the PWM edge. During complimentary chop
mode the high-side and low-side drives are alternatively
enabled and disabled during the PWM cycle. To prevent shoot-
through current, the high-side drive turn-on is delayed by tD1,
and the low-side drive turn on is delayed by tD2 (see Figure 2,
CRES =
QG x VGS
2 x VGS x VSAG - VSAG2
CRES =
(60 nC) x (14 V)
2 x (14 V) x (0.2 V) - (0.2)2
= 0.15
F
CRES
20
< CP1 = CP2 <
10
CRES
0.15
F
20
= 0.075
F, lower limit; and
10
0.15
F
= .015
F, upper limit
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