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  • 參數(shù)資料
    型號: MC33389ADW
    廠商: MOTOROLA INC
    元件分類: 網(wǎng)絡接口
    英文描述: System Basis Chip with Low Speed Fault Tolerant CAN
    中文描述: DATACOM, INTERFACE CIRCUIT, PDSO28
    封裝: PLASTIC, SO-28
    文件頁數(shù): 20/35頁
    文件大?。?/td> 609K
    代理商: MC33389ADW
    MC33389
    20
    MC33389
    Freescale Semiconductor, Inc.
    General Description
    The SPI system is flexible enough to communicate directly
    with numerous standard peripherals and MCUs available from
    Motorola and other semiconductor manufacturers. SPI
    reduces the number of pins necessary for input/output on the
    MC33389. The SPI system of communication consists of the
    MCU transmitting, and in return, receiving one databit of
    information per clock cycle. Databits of information are
    simultaneously transmitted by one pin, Microcontroller Out
    Serial In (MOSI), and received by another pin, Microcontroller
    In Serial Out (MISO), of the MCU. Figure 21 below shows the
    basic SPI configuration between an MCU and one MC33389.
    The SPI serial operation is guaranteed to 2.0 MHz.
    Figure 21. SPI Interface With Microcontroller
    Control and Status Reporting of the MC33389
    The MCU is responsible for the control data transfer to the
    MC33389, while the MC33389 reports its status to the MCU.
    Summarized below are the major data for control and status
    reporting.
    - SPI initialization during start up
    - MC33389 control during operation
    - Watchdog triggering
    - Reading status registers of the MC33389
    Control Data
    The control data are transferred from the MCU to the
    MC33389. A control word includes an address of a certain
    control register and the appropriate data. Basically the
    following data will be transferred (See the SPI Register
    Description section on page 21).
    - MC33389 mode control
    - Supply control
    - Forced wake-up timing
    - Cyclic sense control
    - Watchdog control
    - Transceiver control
    Status Data
    The status data are transmitted from the MC33389 to the
    MCU. After receiving a valid register address from the MCU,
    the MC33389 returns the appropriate status. Some of the
    major status data are listed below:
    - Current operation mode status
    - Wake-up sources
    - Reset status
    - Error status
    - Overtemperature status
    - Transceiver status
    MOSI
    CSB
    SCLK
    MISO
    MOSI
    MISO
    MC68HCXX
    MC33389
    Data Transfer
    The data to and from the MC33389 are transferred in form
    of two bytes.The structure of the transferred information is the
    same for control the MC33389 and status reporting. The
    address field A5 to A0 (Bit15 to Bit10) contains the address of
    a control or status register in the MC33389. RW (Bit9 and Bit8)
    contains the read/write flag for the data field. The parity field is
    located at P3 to P0 (Bit7 to Bit4). The data field D3 to D0 (Bit3
    to Bit0) is attached to the 2 byte data word, see figure below.
    Figure 22.
    The SBC is accessible via the SPI interface in
    NormalRequest mode, Normal mode and Standby mode. In
    all other modes (Sleep mode, Emergency mode), the voltage
    supply for the microcontroller in permanently switched off and
    the SBC input logic for MISO, MOSI, CSB and SCLK isn’t
    working (except SPI wake-up function in Sleep mode).
    Writing Data
    To write data in a SPI register, two one-byte transmissions
    have to performed. The first byte contains the address of the
    register (MSB first) and the read/write bits which have to be
    set to 1. The second byte contains the new data addressed by
    the previous byte (MSB first) and the parity information. The
    calculation of the parity field P3-P0 has to follow the equations
    below:
    P3
    D3
    D0
    =
    P2
    D3
    D2
    =
    P1
    D2
    D1
    =
    P0
    D1
    D0
    =
    (EX-OR)
    Note, that during the transmission of the two bytes the
    CSB pin remains 0. See figure23 hereafter.
    Figure 23.
    The SBC sends back the old address, R/W, parity, and
    data information from a previous transmission. This data
    contains no useful information (e.g. status).It shouldn’t be used.
    In case of a wrong address field or parity mismatch, an
    interrupt will be issued and the SBC retains the old state.
    Reading Data
    To read data from a dedicated register two one-byte
    transmissions have to be performed. The first byte contains
    the address of the register (MSB first) and the read/write flag
    setting to 0. The second byte needn’t to contain valid data,
    A5 A4 A3 A2 A1 A0
    D3 D2 D1 D0
    P3 P2 P1 P0
    RW
    RW
    Bit14 Bit13 Bit12 Bit11 Bit10 Bit9
    Bit8
    Bit7
    Bit6
    Bit5
    Bit4
    Bit3
    Bit2
    Bit1
    Bit0
    Bit15
    address + R/W
    data
    parity
    MOSI
    MISO
    A5 A4 A3 A2 A1 A0
    D3 D2 D1 D0
    P3 P2 P1 P0
    RW
    RW
    A3 A2 A1 A0
    1
    1
    A5 A4
    SBC SPI Data Register
    Bit14 Bit13 Bit12 Bit11 Bit10 Bit9
    Bit8
    Bit7
    Bit6
    Bit5
    Bit4
    Bit3
    Bit2
    Bit1
    Bit0
    Bit15
    Bit7
    Bit6
    Bit5
    Bit4
    Bit3
    Bit2
    Bit1
    Bit0
    HC08/12 SPI Data Register
    old address + R/W
    old data
    old parity
    new address + R/W (1st byte)
    new data + parity (2nd byte)
    D3 D2 D1 D0
    P3 P2 P1 P0
    F
    For More Information On This Product,
    Go to: www.freescale.com
    n
    .
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