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參數(shù)資料
| 型號(hào)： | MC33179PG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 4/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP QUAD LP LO NOISE 14DIP |
| 標(biāo)準(zhǔn)包裝： | 500 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 4 |
| 轉(zhuǎn)換速率： | 2 V/µs |
| 增益帶寬積： | 5MHz |
| 電流 - 輸入偏壓： | 100nA |
| 電壓 - 輸入偏移： | 1500µV |
| 電流 - 電源： | 1.7mA |
| 電流 - 輸出 / 通道： | 100mA |
| 電壓 - 電源，單路/雙路(±)： | 4 V ~ 36 V，±2 V ~ 18 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 14-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 14-PDIP |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁面： | 1130 (CN2011-ZH PDF) |
| 其它名稱： | MC33179PGOS |
MC33178, MC33179
http://onsemi.com
12
If a high source of resistance is used (R1 > 1.0 k
W), a
compensation capacitor equal to or greater than the input
capacitance of the op amp (10 pF) placed across the
feedback resistor (see Figure 35) can be used to neutralize
that pole and prevent outer loop oscillation. Since the closed
loop transient response will be a function of that
capacitance, it is important to choose the optimum value for
that capacitor. This can be determined by the following
Equation:
(1)
CC + (1 ) [R1 R2])2
CL (ZO R2)
where: ZO is the output impedance of the op amp.
For moderately high capacitive loads (500 pF < CL
< 1500 pF) the addition of a compensation resistor on the
order of 20
W between the output and the feedback loop will
help to decrease miller loop oscillation (see Figure 36). For
high capacitive loads (CL > 1500 pF), a combined
compensation scheme should be used (see Figure 37). Both
the compensation resistor and the compensation capacitor
affect the transient response and can be calculated for
optimum performance. The value of CC can be calculated
using Equation 1. The Equation to calculate RC is as follows:
(2)
RC + ZO
R1 R2
Figure 35. Compensation for
High Source Impedance
Figure 36. Compensation Circuit for
Moderate Capacitive Loads
Figure 37. Compensation Circuit for
High Capacitive Loads
R2
+
R1
ZL
CC
R2
RC
CL
R1
+
R2
CC
RC
CL
R1
+
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