參數(shù)資料
型號: MC33157
廠商: ON SEMICONDUCTOR
英文描述: Tag-it(TM) HF-I Plus Transponder Inlays Square 0-RFIDN -25 to 70
中文描述: 半橋控制器和工業(yè)線性驅(qū)動管
文件頁數(shù): 8/12頁
文件大?。?/td> 269K
代理商: MC33157
MC33157
http://onsemi.com
8
DD
VON
V
U
VLO
U
ref
V
CPH
V
9.2 V typ
3.8 V typ
(PREHEAT)
STRIKE
Frequency
SWEEP
DETECTION
RESET
Output
OFF STATE
1
0
Rise time
t 1 s
STRIKE
tph
lms
7.0 V typ
UVLO
F1
F2
F3
F1
F2
F3
time
OFF STATE
f1 = fPH, preheating frequency adjusted by RPH and RENDSWEEP
f2 = fENDSWEEP, end of sweep frequency, adjusted by RENDSWEEP (pin 2). In any case f1
f3 = fOP, operating frequency controlled by the ICO current (pin 7) and capacitor COP
tPH = (CPH *2/3 *Vref) / ( *ItPH)
“OFF” state: High side switch OFF, Low side switch ON
f2
F
F
Figure 9. TIMING DIAGRAM (Normal startup sequence and UVLO reset)
Frequency
status
ref
+V
CSWP
V
STRIKE
DETECTION
RESET
FSweep
1
0
F3
time
OFF STATE
Previous On state
When RESET pin is released to a logic one, the systemjumps to the preheat frequency as defined by RPH,
then executes a frequency sweep down to fENDSWEEP, as defined by RENDSWEEP, and waits until a strike
detection signal is applied to pin 9. There is no preheating timng performed after a reset comng frompin 10.
RESET logic level is CMOS compatible.
Note: Strike detection lever can be either digital – CMOS or analog as depicted here above, as long as the
signal fulfills the SDHIGH and SDLOW values and timng.
OFF STATE: both output MOSFET are biased in the off condition.
10 s
F3
VCSWP
No further logic action activated
SD
SD
Figure 10. TIMING DIAGRAM (External reset)
LOW
HIGH
Output Frequency
status
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