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參數(shù)資料
| 型號： | MC1494 |
| 廠商： | ON SEMICONDUCTOR |
| 英文描述： | LINEAR FOUR-QUADRANT MULTIPLIER INTEGRATED CIRCUIT |
| 中文描述： | 線性四象限乘法器集成電路 |
| 文件頁數(shù)： | 13/16頁 |
| 文件大小： | 319K |
| 代理商： | MC1494 |
MC1494
13
MOTOROLA ANALOG IC DEVICE DATA
eo = Kecem
K = 1
4.7 k
eo = em ec
ec =
±
1 Vpk
em =
±
2 Vpk
51 k
20 k
P2
20 k
P1
RL
14
3.0 k
6.2 k
0.1
μ
F
8
11
12
7
15
5
–15 V+15 V
2
1
3
6
13
4
16 k
em
9
R
10
0.1
μ
F
ec
+
+
MC1494
R
Figure 27. Balanced Modulator
The adjustment procedure for this circuit is quite simple.
1.
Place the carrier signal at Pin 10. With no signal applied
to Pin 9, adjust potentiometer P1 such that an AC null is
obtained at the output.
2.
Place a modulation signal at Pin 9. With no signal
applied to Pin 10, adjust potentiometer P2 such that an
AC null is obtained at the output.
Again, the ability to make careful adjustment of these
offsets will be a function of the type of potentiometers used
for P1 and P2. Multiple turn cermet type potentiometers
are recommended.
Frequency Doubler
If for Figure 27 both inputs are identical:
em = ec = E cos
ω
t
then the output is given by,
eo = emec = E2 cos2
ω
t
which reduces to,
eo =2
(1 + cos2
ω
t)
This equation states that the output will consist of a DC
term equal to one half the peak voltage squared and the
second harmonic of the input frequency. Thus, the circuit acts
as a frequency doubler. Two facts about this circuit are
worthy of note. First, the second harmonic of the input
frequency is the only frequency appearing at the output. The
fundamental does not appear. Second, if the input is
sinusoidal, the output will be sinusoidal and requires no
filtering.
The circuit of Figure 27 can be used as a frequency
doubler with input frequencies in excess of 2.0 MHz.
Amplitude Modulator
The circuit of Figure 27 is also easily used as an amplitude
modulator. This is accomplished by simply varying the input
offset adjust potentiometer (P1) associated with the
mudulation input. This procedure places a DC offset on the
modulation input of the multiplier such that the carrier still
passes through the multiplier when the modulating signal is
zero. The result is amplitude modulation. This is easily seen
by examining the basic mathematical expression for
amplitude modulation given below. For the case under
discussion, with K = 1,
eo = (E + Em cos
ω
mt) (Ec cos
ω
ct)
where E is the DC input offset adjust voltage. This expression
can be written as:
eo = Eo [1 + M cos
ω
ct] cos
ω
ct
where, Eo = EEc
= modulation index.
and, M =
E
Em
This is the standard equation for amplitude modulation.
From this, it is easy to see that 100% modulation can be
achieved by adjusting the input offset adjust voltage to be
exactly equal to the peak value of the modulation (Em). This
is done by observing the output waveform and adjusting the
input offset potentiometer (P1) until the output exhibits the
familiar amplitude modulation waveform.
Phase Detector
If the circuit of Figure 27 has as its inputs two signals of
identical frequency, but having a relative phase shift, the
output will be a DC signal which is directly proportional to the
cosine of phase difference as well as the double frequency
term.
ec= Ec cos
ω
ct
em= Em cos(
ω
ct +
φ
)
eo= ecem = EcEm cos
ω
ct cos(
ω
ct +
φ
)
EcEm
[cos
φ
+ cos(2
ω
ct +
φ
)]
or, eo =
2
The addition of a simple low pass filter to the output (which
eliminates the second cosine term) and return of RL to an
offset adjustment potentiometer will result in a DC output
voltage which is proportional to the cosine of the phase
difference. Hence, the circuit functions as a synchronous
detector.
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