參數(shù)資料
型號： MC14541BCL
廠商： MOTOROLA INC
元件分類： 通用總線功能
英文描述： Programmable Timer
中文描述： 4000/14000/40000 SERIES, SYN POSITIVE EDGE TRIGGERED 16-BIT UP BINARY COUNTER, CDIP16
封裝： CERAMIC, DIP-16
文件頁數(shù)： 2/7頁
文件大?。?/td> 204K
代理商： MC14541BCL
MOTOROLA CMOS LOGIC DATA
MC14541B
2
Min
Vdc
Characteristic
Symbol
Unit
Max
Min
Typ #
Max
Min
Max
Output Voltage
Vin = VDD or 0
“0” Level
VOL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
“1” Level
Vin = 0 or VDD
VOH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Input Voltage
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
“0” Level
VIL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
Vdc
“1” Level
(VO = 0.5 or 4.5 Vdc)
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
Output Drive Current
(VOH = 2.5 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
(VOL = 0.4 Vdc)
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
VIH
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
Vdc
Source
IOH
5.0
10
15
– 7.96
– 4.19
– 16.3
—
—
—
– 6.42
– 3.38
– 13.2
– 12.83
– 6.75
– 26.33
—
—
—
– 4.49
– 2.37
– 9.24
—
—
—
mAdc
Sink
IOL
5.0
10
15
1.93
4.96
19.3
—
—
—
1.56
4.0
15.6
3.12
8.0
31.2
—
—
—
1.09
2.8
10.9
—
—
—
mAdc
Input Current
Iin
Cin
15
—
±
0.1
—
±
0.00001
±
0.1
—
±
1.0
μ
Adc
Input Capacitance
(Vin = 0)
—
—
—
—
5.0
7.5
—
—
pF
Quiescent Current
(Pin 5 is High)
Auto Reset Disabled
IDD
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
μ
Adc
Auto Reset Quiescent Current
(Pin 5 is low)
IDDR
10
15
—
—
250
500
—
—
30
82
250
500
—
—
1500
2000
μ
Adc
Supply Current**
(Dynamic plus Quiescent)
ID
5.0
10
15
ID = (0.4
μ
A/kHz) f + IDD
ID = (0.8
μ
A/kHz) f + IDD
ID = (1.2
μ
A/kHz) f + IDD
μ
Adc
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25 C.
When using the on chip oscillator the total supply current (in
μ
Adc) becomes: IT = ID + 2 Ctc VDD f x 10–3 where ID is in
μ
A, Ctc is in pF,
VDD in Volts DC, and f in kHz. (see Fig. 3) Dissipation during power–on with automatic reset enabled is typically 50
μ
A @ VDD = 10 Vdc.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However,
precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance
circuit. For proper operation, Vin and Vout should be constrained to the range VSS
≤
(Vin or Vout)
≤
VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must
be left open.
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MC14541BDR2 功能描述:計(jì)時器和支持產(chǎn)品 LOG CMOS OSILATR TIMER RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel
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