參數(shù)資料
型號: MC14538BFG
廠商: ON Semiconductor
文件頁數(shù): 10/14頁
文件大小: 0K
描述: IC MULTIVIBRATOR DUAL 16SOEIAJ
標(biāo)準(zhǔn)包裝: 50
系列: 4000B
邏輯類型: 單穩(wěn)態(tài)
獨(dú)立電路: 2
施密特觸發(fā)器輸入:
傳輸延遲: 95ns
輸出電流高,低: 8.8mA,8.8mA
電源電壓: 3 V ~ 18 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOEIAJ
包裝: 管件
其它名稱: MC14538BFG-ND
MC14538BFGOS
MC14538B
http://onsemi.com
5
Figure 1. Logic Diagram
(1/2 of DevIce Shown)
NOTE: Pins 1, 8 and 15 must
be externally grounded
-
+
-
+
VDD
P1
RX
CX
2
1
(14)
(15)
4 (12)
5(11)
3 (13)
A
B
RESET
VSS
N1
Vref1
C1
C2
ENABLE
Vref2
ENABLE
CONTROL
S
RESET LATCH
QR
R
S
R
S
Q
6(10)
7(9)
OUTPUT
LATCH
Figure 2. Power Dissipation Test Circuit and Waveforms
500 pF
VDD
0.1
mF
CERAMIC
RX
RX
CX
VSS
CX
VSS
Vin
CX/RX
A
B
RESET
A
B
RESET
Q
Q
VSS
CL
20 ns
VDD
0 V
90%
10%
Vin
ID
INPUT CONNECTIONS
Characteristics
Reset
A
B
tPLH, tPHL, tTLH, tTHL,
T, tWH, tWL
VDD
PG1
VDD
tPLH, tPHL, tTLH, tTHL,
T, tWH, tWL
VDD
VSS
PG2
tPLH(R), tPHL(R),
tWH, tWL
PG3
PG1
PG2
Figure 3. Switching Test Circuit
*Includes capacitance of probes,
wiring, and fixture parasitic.
NOTE: Switching test waveforms
for PG1, PG2, PG3 are shown
In Figure 4.
VDD
RX
RX
VSS
CX
CX/RX
A
B
RESET
A
B
RESET
Q
Q
CL
CX
CL
VSS
PULSE
GENERATOR
PULSE
GENERATOR
PULSE
GENERATOR
VSS
*CL = 50 pF
PG1 =
PG2 =
PG3 =
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