參數(shù)資料
型號: MC145230
廠商: Motorola, Inc.
英文描述: Dual PLL Frequency Synthesizers With DACs and Voltage Multipliers(帶DACs和電壓乘法器的雙PLL頻率合成器)
中文描述: 雙鎖相環(huán)頻率合成器與DAC和電壓倍增器(帶數(shù)模轉換器和電壓乘法器的雙鎖相環(huán)頻率合成器)
文件頁數(shù): 56/71頁
文件大?。?/td> 906K
代理商: MC145230
MC145225 MC145230
56
MOTOROLA RF/IF DEVICE DATA
Figure 63. PDout at Input to Loop Filter
Summary
PSpice provides a method by which the performance of
PLL circuitry can be simulated prior to, or in addition to,
laboratory testing. The use of behavioral modeling allows the
creation of simulation circuits that can provide valuable
information for loop filter design and adjustment. By judicious
attention to VCO modeling, expected output characteristics
can be verified prior to laboratory testing. While simulation
does not replace laboratory testing, it can be used to find
solutions to “what if” questions without the need for extensive
empirical data gathering.
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