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參數(shù)資料
| 型號： | MC144144P |
| 廠商： | MOTOROLA INC |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Digital Signal Processors 44-JLCC -55 to 125 |
| 中文描述： | COLOR SIGNAL DECODER, PDIP18 |
| 封裝： | PLASTIC, DIP-18 |
| 文件頁數(shù)： | 22/44頁 |
| 文件大?。?/td> | 565K |
| 代理商： | MC144144P |
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MC144144
22
MOTOROLA
The default value in this register is set to FFh, which pro-
duces a 15 row display with base row 15. Entering a new val-
ue in this register can alter the size and placement of the
TEXT display. For example, to produce an 8 row TEXT dis-
play with a base row of 12, this register should be set to 8Ch.
If the value of the x and y bits result in a display where TEXT
rows are off the top of the screen, then the first row of the
TEXT display will start in row 1 and have the number of rows
determined by the x value.
Line 21 Activity Register —
Address = 04h
D7
D6
D5
D4
D3
D2
D1
D0
res
res
res
res
res
res
XDS
SCH
D0 – SCH —
Indicates data being processed in the data
channel selected for display. Will become inactive if no data
is received for the selected channel within the previous
16 sec. HIGH = active, LOW = inactive. The reset state is
LOW.
D1 – XDS—
Indicates XDS data is being processed. Will be-
come inactive if no XDS data is received within the previous
16 seconds. HIGH = active, LOW = inactive. The reset state
is LOW.
XDS Filter Register —
Address = 05h
D7
D6
D5
D4
D3
D2
D1
D0
s2
s1
s0
PUBL
MISC
CHAN
FUTR
CURR
D0 – CURR —
Selects current class packets for output
through the serial control port when XDS recovery has been
enabled.
D1 – FUTR —
Selects future class packets for output
through the serial control port when XDS recovery has been
enabled.
D2 – CHAN —
Selects channel information class packets for
output through the serial control port when XDS recovery has
been enabled.
D3 – MISC —
Selects miscellaneous class packets for out-
put through the serial control port when XDS recovery has
been enabled.
D4 – PUBL —
Selects public service class packets for output
through the serial control port when XDS recovery has been
enabled.
D5 – D7 = s0 – s2
—
Selects a set of secondary parameters,
tabulated below, to be used in filtering the XDS data when
XDS recovery has been enabled.
s2
0
0
0
0
1
1
1
1
s1
0
0
1
1
0
0
1
1
s0
0
1
0
1
0
1
0
1
Secondary Filter
All
Time Information Only
In Band Only
Out of Band Only
VCR Information
Reserved
Reserved
Reserved
Setting this register to 00h turns XDS data recovery off.
Setting bits D0 through D4 enables XDS data recovery for
the classes selected as qualified by the secondary filter ac-
tion specified by bits D5 – D7. If Bits D0 – D4 are all set to 1,
all classes of XDS data will be output (even reserved and un-
defined).
The time information only selection includes the time of
day (TOD) and local time zone (LTZ) packets.
VCR information will select TOD, LTZ, net ID, local call let-
ters, impulse capture, tape delay, composite 2, and out of
band channel number packets for recovery.
Interrupt Request Register —
Address = 06h
D7
D6
D5
D4
D3
D2
D1
D0
dTXT
dCAP
dXDS
dSCH
dLOK
EOF
DLE
res
D0 – res —
Reserved.
D1 – DLE —
Active HIGH, indicating that the data line has
ended. This bit will clear in each field, a few lines after row
15.
D2 – EOF —
Active HIGH, indicating that the video signal is
currently at the end of a field. This bit will clear in each field,
a few lines after row 15.
D3 – dLOK —
Active HIGH, indicating that the state of the
LOCK signal has changed. The SS register must be read to
determine the current state.
D4 – dSCH —
Active HIGH, indicating that a change in se-
lected channel activity has occurred. The Line 21 activity reg-
ister must be read in order to determine if the selected data
channel is active.
D5 – dXDS —
Active HIGH, indicating that a change in XDS
activity has occurred. The Line 21 activity register must be
read to determine if XDS data is active.
D6 – dCAP —
Active HIGH, indicating that a change in a
caption data channel activity has occurred. The caption ac-
tivity register must be read to determine which caption data
channels are active.
D7 – dTXT —
Active HIGH, indicating that a change in a text
data channel activity has occurred. The caption activity regis-
ter must be read to determine which text data channels are
active.
Except as noted for the case of bits D1 and D2 above, the
master device must write a one to the appropriate bit in the
interrupt request register to clear the interrupt.
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