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參數(shù)資料
| 型號： | MC144111P |
| 廠商： | MOTOROLA INC |
| 元件分類： | DAC |
| 英文描述： | Digital-to-Analog Converters with Serial Interface |
| 中文描述： | SERIAL INPUT LOADING, 6-BIT DAC, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 184K |
| 代理商： | MC144111P |
MC144110
MC144111
6
MOTOROLA
PIN DESCRIPTIONS
INPUTS
Din
Data Input
Six–bit words are entered serially, MSB first, into digital
data input, Din. Six words are loaded into the MC144110
during each D/A cycle; four words are loaded into the
MC144111.
The last 6–bit word shifted in determines the output level of
pins Q1 Out and R1 Out. The next–to–last 6–bit word affects
pins Q2 Out and R2 Out, etc.
ENB
Negative Logic Enable
The ENB pin must be low (active) during the serial load.
On the low–to–high transition of ENB, data contained in the
shift register is loaded into the latch.
CLK
Shift Register Clock
Data is shifted into the register on the high–to–low transi-
tion of CLK. CLK is fed into the D–input of a transparent
latch, which is used for inhibiting the clocking of the shift reg-
ister when ENB is high.
The number of clock cycles required for the MC144110 is
usually 36. The MC144111 usually uses 24 cycles. See
Table 1 for additional information.
OUTPUTS
Dout
Data Output
The digital data output is primarily used for cascading the
DACs and may be fed into Din of the next stage.
R1 Out through Rn Out
Resistor Network Outputs
These are the R–2R resistor network outputs. These out-
puts may be fed to high–impedance input FET op amps to
bypass the on–chip bipolar transistors. The R value of the re-
sistor network ranges from 7 to 15 k
.
Q1 Out through Qn Out
NPN Transistor Outputs
Buffered DAC outputs utilize an emitter–follower configu-
ration for current–gain, thereby allowing interface to low–im-
pedance circuits.
SUPPLY PINS
VSS
Negative Supply Voltage
This pin is usually ground.
VDD
Positive Supply Voltage
The voltage applied to this pin is used to scale the analog
output swing from 4.5 to 15 V p–p.
Table 1. Number of Channels vs Clocks Required
Number of
Channels
Required
Number of
Clock Cycles
Outputs Used on MC144110
Outputs Used on MC144111
1
6
Q1/R1
Q1/R1
2
12
Q1/R1, Q2/R2
Q1/R1, Q2/R2
3
18
Q1/R1, Q2/R2, Q3/R3
Q1/R1, Q2/R2, Q3/R3
4
24
Q1/R1, Q2/R2, Q3/R3, Q4/R4
Q1/R1, Q2/R2, Q3/R3, Q4/R4
5
30
Q1/R1, Q2/R2, Q3/R3, Q4/R4, Q5/R5
Not Applicable
6
36
Q1/R1, Q2/R2, Q3/R3, Q4/R4, Q5/R5, Q6/R6
Not Applicable
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