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參數(shù)資料
| 型號： | MC14029BFELG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 0K |
| 描述： | IC COUNTER BIN/DEC U/D 16SOEIAJ |
| 產(chǎn)品變化通告： | Product Discontinuation 30/Sept/2011 |
| 標準包裝： | 1 |
| 系列： | 4000B |
| 邏輯類型： | 二進制計數(shù)器，十進制 |
| 方向： | 上，下 |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 4 |
| 計時： | 同步 |
| 計數(shù)速率： | 10MHz |
| 觸發(fā)器類型： | 正邊沿 |
| 電源電壓： | 3 V ~ 18 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOEIAJ |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | MC14029BFELGOSCT |
Semiconductor Components Industries, LLC, 2013
April, 2013 Rev. 8
1
Publication Order Number:
MC14029B/D
MC14029B
Binary/Decade Up/Down
Counter
The MC14029B Binary/Decade up/down counter is constructed
with MOS Pchannel and Nchannel enhancement mode devices in a
single monolithic structure. The counter consists of type D flipflop
stages with a gating structure to provide toggle flipflop capability.
The counter can be used in either Binary or BCD operation. This
complementary MOS counter finds primary use in up/down and
difference counting and frequency synthesizer applications where low
power dissipation and/or high noise immunity is desired. It is also
useful in A/D and D/A conversion and for magnitude and sign
generation.
Features
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Internally Synchronous for High Speed
Logic EdgeClocked Design Count Occurs on Positive Going Edge
of Clock
Asynchronous Preset Enable Operation
Capable of Driving Two LowPower TTL Loads or One LowPower
Schottky TTL Load Over the Rated Temperature Range
Pin for Pin Replacement for CD4029B
These Devices are PbFree and are RoHS Compliant
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to VSS)
Symbol
Parameter
Value
Unit
VDD
DC Supply Voltage Range
0.5 to +18.0
V
Vin, Vout
Input or Output Voltage Range (DC or Transient)
0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current (DC or Transient) per Pin
±10
mA
PD
Power Dissipation, per Package (Note 1)
500
mW
TA
Ambient Temperature Range
55 to +125
°C
Tstg
Storage Temperature Range
65 to +150
°C
TL
Lead Temperature (8Second Soldering)
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be
taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, Vin and Vout
should be constrained to the range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level
(e.g., either VSS or VDD). Unused outputs must be left open.
http://onsemi.com
MARKING
DIAGRAMS
PDIP16
P SUFFIX
CASE 648
MC14029BCP
AWLYYWWG
SOIC16
D SUFFIX
CASE 751B
14029BG
AWLYWW
A
= Assembly Location
WL
= Wafer Lot
YY, Y
= Year
WW
= Work Week
G
= PbFree Indicator
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
16
1
16
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