
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
37
MC14008B
The MC14008B 4–bit full adder is constructed with MOS P–channel and
N–channel enhancement mode devices in a single monolithic structure. This
device consists of four full adders with fast internal look–ahead carry output.
It is useful in binary addition and other arithmetic applications. The fast
parallel carry output bit allows high–speed operation when used with other
adders in a system.
Look–Ahead Carry Output
Diode Protection on All Inputs
All Outputs Buffered
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Pin–for–Pin Replacement for CD4008B
MAXIMUM RATINGS*
(Voltages Referenced to VSS)
Symbol
Parameter
VDD
Vin, Vout
lin, lout
DC Supply Voltage
Value
– 0.5 to + 18.0
Unit
V
Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
±
10
V
Input or Output Current (DC or Transient),
mA
Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
BLOCK DIAGRAM
HIGH–SPEED
PARALLEL CARRY
14
Cout
13
S4
12
S3
11
S2
10
S1
B4 15
A4
1
B3
2
A3
3
B2
4
A2
5
B1
6
A1
7
Cin
9
ADDER
4
ADDER
3
ADDER
2
ADDER
1
C4
C3
C2
VDD = PIN 16
VSS = PIN 8
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
TRUTH TABLE
(One Stage)
L SUFFIX
CERAMIC
CASE 620
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
P SUFFIX
PLASTIC
CASE 648
D SUFFIX
SOIC
CASE 751B
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
S3
S4
Cout
B4
VDD
Cin
S1
S2
B2
A3
B3
A4
VSS
A1
B1
A2
PIN ASSIGNMENT
Cin
0
0
0
0
1
1
1
1
B
A
Cout
0
0
0
1
0
1
1
1
S
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1