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參數(shù)資料
| 型號： | MC12430 |
| 廠商： | Motorola, Inc. |
| 英文描述： | High Frequency PLL Clock Generator(高頻PLL時鐘發(fā)生器) |
| 中文描述： | 高頻PLL時鐘發(fā)生器（高頻鎖相環(huán)時鐘發(fā)生器） |
| 文件頁數(shù)： | 8/11頁 |
| 文件大小： | 127K |
| 代理商： | MC12430 |
MC12430
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 3
8
supply filter and bypass schemes discussed in this section
should be adequate to eliminate power supply noise related
problems in most designs.
Jitter Performance of the MC12430
The MC12430 exhibits long term and cycle–to–cycle jitter
which rivals that of SAW based oscillators. This jitter
performance comes with the added flexibility one gets with a
synthesizer over a fixed frequency oscillator.
Figure 7. RMS PLL Jitter versus VCO Frequency
0
5
10
15
20
25
400
500
600
700
800
N=2
N=4
N=8
VCO Frequency (MHz)
R
Figure 7 illustrates the RMS jitter performance of the
MC12430 across its specified VCO frequency range. Note
that the jitter is a function of both the output frequency as well
as the VCO frequency, however the VCO frequency shows a
much stronger dependence. The data presented has not
been compensated for trigger jitter, this fact provides a
measure of guardband to the reported data. In addition, the
data represents long term period jitter, the cycle–to–cycle
jitter could not be measured to the level of accuracy required
with available test equipment but certainly will be smaller
than the long term period jitter.
The most commonly specified jitter parameter is
cycle–to–cycle jitter. Unfortunately, with today’s high
performance measurement equipment, there is no way to
measure this parameter for jitter performance in the class
demonstrated by the MC12430. As a result, different
methods are used which approximate cycle–to–cycle jitter.
The typical method of measuring the jitter is to accumulate a
large number of cycles, create a histogram of the edge
placements and record peak–to–peak as well as standard
deviations of the jitter. Care must be taken that the measured
edge is the edge immediately following the trigger edge. The
oscilloscope cannot collect adjacent pulses, rather it collects
pulses from a very large sample of pulses. It is safe to
assume that collecting pulse information in this mode will
produce period jitter values somewhat larger than if
consecutive cycles (cycle–to–cycle jitter) were measured. All
of the jitter data reported on the MC12430 was collected in
this manner.
Figure 8. RMS Jitter versus Output Frequency
0
5
10
15
20
25
25 50 75 100 125 150 175 200 225 250 275 300 325 350 375 400
Output Frequency (MHz)
R
6.25ps Reference
Figure 8 shows the jitter as a function of the output
frequency. For the 12430, this information is probably of more
importance. The flat line represents an RMS jitter value that
corresponds to an 8 sigma
±
25ps peak–to–peak long term
period jitter. The graph shows that for output frequencies
from 87.5 to 400MHz the jitter falls within the
±
25ps
peak–to–peak specification. The general trend is that as the
output frequency is decreased the output edge jitter will
increase.
The jitter data from Figure 7 and Figure 8 do not include
the performance of the 12430 when the output is in the divide
by 1 mode. In divide by one mode, the output signal is a
digitally doubled version of the VCO output. The period of the
outputs of the digital doubler is dependent on the duty cycle
of the VCO output. Since the VCO output duty cycle cannot
be guaranteed to be always 50%, the resulting 12430 output
in divide by one mode will be bimodal at times. Since a
bimodal distribution cannot be accurately represented with
an rms value, peak–to–peak values of jitter for the divide by
one mode are presented.
Figure 9 shows the peak–to–peak jitter of the 12430
output in divide by one mode as a function of output
frequency. Notice that as with the other modes the jitter
improves with increasing frequency. The
±
65ps shown in the
data sheet table represents a conservative value of jitter,
especially for the higher VCO, and thus output frequencies.
Figure 9. Peak–to–Peak Jitter versus
Output Frequency
40
60
80
100
120
140
400
500
600
700
800
Spec Limit
N=1
Output Frequency (MHz)
P
The jitter data presented should provide users with
enough information to determine the effect on their overall
timing budget. The jitter performance meets the needs of
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