參數(shù)資料
型號: MC1121DMR2
廠商: ON SEMICONDUCTOR
元件分類: 穩(wěn)壓器
英文描述: 100mA Charge Pump Voltage Converter with Shutdown
中文描述: SWITCHED CAPACITOR CONVERTER, 200 kHz SWITCHING FREQ-MAX, PDSO5
封裝: PLASTIC, MICROPAK-8
文件頁數(shù): 4/8頁
文件大小: 102K
代理商: MC1121DMR2
MC1121
http://onsemi.com
4
Figure 2. Cascading MC1121s to Increase Output Voltage
GND
CAP–
FC
Vout
SHDN
4
3
1
8
5
2
6
7
CAP+
C1
OSC
VDD
SHDN*
Vin+
+
C2
+
MC1121
“1”
NOTES: *SHDN should be tied to it’s respective VDD if not used.
GND
CAP–
FC
Vout
SHDN
4
3
1
8
5
2
6
7
CAP+
C1n
OSC
VDD
SHDN*
+
C2
+
Vout
MC1121
“n”
Paralleling Devices
To reduce output resistance, multiple MC1121s may be
paralleled (see Figure 3). Each device needs a pump
capacitor C1, but the reservoir capacitor C2 serves all
devices. The value of C2 should be increased by a factor of
n (the number of devices).
Figure 3. Paralleling MC1121s to Reduce Output Resistance
GND
CAP–
FC
Vout
SHDN
4
3
1
8
5
2
6
7
CAP+
C1
OSC
VDD
*SHDN
Vin+
+
MC1121
“1”
NOTES: *SHDN should be tied to VDD if not used.
GND
CAP–
FC
Vout
SHDN
4
3
1
8
5
2
6
7
CAP+
C1n
OSC
VDD
SHDN*
+
C2
+
MC1121
“n”
OSC
Rout = Rout (of MC1121)/n(number of devices)
Combined Positive Supply Multiplication and Negative
Voltage Conversion
Figure 4 shows this dual function circuit, in which
capacitors C1 and C2 perform pump and reservoir functions
to generate the negative voltage. Capacitors C2 and C4 are
the respective capacitors for the multiplied positive voltage.
This particular configuration leads to higher source
impedances of the generated supplies due to the finite
impedance of the common charge–pump driver.
Figure 4. Combined Positive
Multiplier and Negative Converter
GND
CAP–
FC
Vout
SHDN
4
3
1
8
6
2
5
7
CAP+
C1
OSC
VDD
SHDN*
Vin+
+
C4
+
Vout = Vin–
MC1121
NOTES: *SHDN should be
tied to VDD if not used.
C3
+
C2
+
D1, D2 = 1N4148
Vout = (2Vin) –
(VFD1) – (VFD2)
D1
D2
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