參數(shù)資料
型號(hào): MC10H681
廠商: ON SEMICONDUCTOR
英文描述: Dual Supply Hex ECL/TTL Transceiver With Latches(雙電源,六 ECL/TTL收發(fā)器(帶鎖存))
中文描述: 雙電源六角ECL /鎖存器的TTL(雙電源,六ECL / TTL電收發(fā)器(帶鎖存))
文件頁(yè)數(shù): 1/8頁(yè)
文件大?。?/td> 124K
代理商: MC10H681
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC10H681/D
The MC10/100H681 is a dual supply Hex ECL/TTL transceiver
with latches in both directions. ECL controlled Direction and Chip
Enable Bar pins. There are two Latch Enable pins, one for each
direction.
The ECL outputs are single ended and drive 50
. The TTL outputs
are specified to source 15 mA and sink 48 mA, allowing the ability to
drive highly capacitive loads. The high driving ability of the TTL
outputs make the device ideal for bussing applications.
The ECL output levels are standard VOH and VOL cutoff equal to
–2.0 V (VTT). When the ECL ports are disabled the outputs go to the
VOL cutoff level. Multiple ECL VCCO pins are utilized to minimize
switching noise.
The TTL ports have standard levels. The TTL input receivers have
PNP input devices to significantly reduce loading. Multiple TTL
power and ground pins are utilized to minimize switching noise.
The 10H version is compatible with MECL 10H ECL logic levels.
The 100H version is compatible with 100K levels.
Separate Latch Enable Controls for each Direction
ECL Single Ended 50
I/O Port
High Drive TTL I/O Ports
Extra TTL and ECL Power/Ground Pins to Minimize Switching
Noise
Dual Supply
Direction and Chip Enable Control Pins
Pinout: 28–Lead PLCC
(Top View)
1
5
6
7
8
9
10
11
25
24
23
22
21
20
19
26
27
28
2
3
4
12
13
14
15
16
17
18
TIO2
VT
GT
TIO1
VT
GT
TIO0
EIO5
VCCO
EIO4
VCCE
EIO3
VCCO
EIO2
T
V
G
T
V
G
T
D
L
E
C
L
E
V
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10H681FN
PLCC–28
37 Units/Rail
MARKING
DIAGRAM
A
WL = Wafer Lot
YY
= Year
WW = Work Week
= Assembly Location
PLCC–28
FN SUFFIX
CASE 776
10H681
AWLYYWW
1
MC100H681FN
PLCC–28
37 Units/Rail
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