- 您現在的位置：買賣IC網 > PDF目錄382290 > MC10H604FNR2 (ON SEMICONDUCTOR) Registered Hex TTL/ECL Translator PDF資料下載
參數資料
| 型號： | MC10H604FNR2 |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Registered Hex TTL/ECL Translator |
| 中文描述： | HEX TTL TO ECL TRANSLATOR, COMPLEMENTARY OUTPUT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數： | 1/4頁 |
| 文件大小： | 97K |
| 代理商： | MC10H604FNR2 |
SEMICONDUCTOR TECHNICAL DATA
2–302
REV 1
Motorola, Inc. 1996
9/96
The MC10H/100H604 is a 6–bit, registered, dual supply TTL to ECL
translator. The device features differential ECL outputs as well as a choice
between either a differential ECL clock input or a TTL clock input. The
asynchronous master reset control is an ECL level input..
With its differential ECL outputs and TTL inputs the H604 device is ideally
suited for the transmit function of a HPPI bus type board–to–board interface
application. The on chip registers simplify the task of synchronizing the data
between the two boards.
The device is available in either ECL standard: the 10H device is
compatible with MECL 10KH logic levels while the 100H device is
compatible with 100K logic levels.
Differential 50
ECL Outputs
Choice Between Differential ECL or TTL Clock Input
Dual Power Supply
Multiple Power and Ground Pins to Minimize Noise
Specified Within–Device Skew
*
Dn
Qn
Qn
MR
TCLK
CLK
CLK
VBB
1 OF 6 BITS
D
CLK
R
Q
LOGIC SYMBOL
*
1. When using MECL inputs, TCLK must be tied to ground (0V).
2. When using only one MECL input, the unused MECL input must be tied
to VBB, and TCLK must be tied to ground (0V).
3. When using TCLK, both MECL inputs must be tied to VEE (–5.2V).
Pinout: 28–Lead PLCC
(Top View)
PIN NAMES
PIN
FUNCTION
D0–D5
CLK, CLK
TCLK
MR
Q0–Q5
Q0–Q5
VCCE
VCCT
VEE
TTL Data Inputs
Differential ECL Clock Input
TTL Clock Input
ECL Master Reset Input
True ECL Outputs
Inverted ECL Outputs
ECL VCC (0V)
TTL VCC (+5.0V)
ECL VEE (–5.2V)
D0
5
6
7
8
9
10
11
25
24
23
22
21
20
19
TCLK
VBB
CLK
CLK
MR
VCCE
Q4
Q5
Q5
Q4
VCCE
Q3
Q3
26
27
28
2
3
4
18
17
16
14
13
12
15
D1
D2 VCCTD3
D4
D5 VCCE
Q0
Q0
VEE
Q1
Q1
Q2
Q2
FN SUFFIX
PLASTIC PACKAGE
CASE 776–02
Dn
L
H
X
TRUTH TABLE
MR
L
L
H
TCLK/CLK
Z
Z
X
Qn+1
L
H
L
Z = LOW to HIGH Transition
相關PDF資料 |
PDF描述 |
|---|---|
| MC100H680FNR2 | 4-Bit Differential ECL Bus/TTL Bus Transceciver |
| MC10H680FNR2 | 4-Bit Differential ECL Bus/TTL Bus Transceciver |
| MC100LVEL51DR2 | Differential Clock D Flip-Flop |
| MC100LVELT23DR2 | 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator |
| MC100LVELT23DR2G | 3.3 V Dual Differential LVPECL/LVDS to LVTTL Translator |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC10H604FNR2G | 功能描述:轉換 - 電壓電平 Registered Hex TTL to ECL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC10H605FN | 功能描述:轉換 - 電壓電平 Registered Hex RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC10H605FNF2G | 制造商:ON Semiconductor 功能描述: |
| MC10H605FNG | 功能描述:轉換 - 電壓電平 BBG ECL TRNSLTR HEX RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC10H605FNR2 | 功能描述:轉換 - 電壓電平 Registered Hex RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:MLF-8 |
發(fā)布緊急采購，3分鐘左右您將得到回復。