參數(shù)資料
型號: MC10H330FNR2
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Low Power 5V RS232 Dual Driver/Receiver with 0.1?μF Capacitors; Package: SO; No of Pins: 16; Temperature Range: -40?°C to 85?°C
中文描述: 10H SERIES, 4-BIT TRANSCEIVER, TRUE OUTPUT, PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 1/4頁
文件大小: 129K
代理商: MC10H330FNR2
SEMICONDUCTOR TECHNICAL DATA
2–299
REV 5
Motorola, Inc. 1996
3/93
!
"
The MC10H330 is a Quad Bus Driver/Receiver with two–to–one output
multiplexers. These multiplexers have a common select and output enable.
When disabled, (OE = high) the bus outputs go to –2.0 V. Their output can be
brought to a low state (VOL) by applying a high level to the receiver enable (RE
= High). The parameters specified are with 25
loading on the bus drivers and
50
loads on the receivers.
Propagation Delay, 1.5 ns Typical Data–to–Output
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 0)
Input Voltage (VCC = 0)
Output Current— Continuous
VEE
VI
Iout
–8.0 to 0
Vdc
0 to VEE
50
100
Vdc
— Surge
mA
Operating Temperature Range
TA
Tstg
0 to +75
°
C
°
C
°
C
Storage Temperature Range— Plastic
— Ceramic
–55 to +150
–55 to +165
ELECTRICAL CHARACTERISTICS
(VEE = –5.2 V
±
5%) (See Note)
0
°
25
°
75
°
Characteristic
Symbol
Min
Max
Min
Max
Min
Max
Unit
Power Supply Current
IE
IinH
157
143
157
mA
μ
A
Input Current High
Pins 5–8, 17–20
Pins 16, 21
Pin 9
667
514
475
417
321
297
417
321
297
Input Current Low
IinL
VOH
VOL
VIH
VIL
0.5
0.5
0.3
μ
A
Vdc
High Output Voltage
–1.02
–0.84
–0.98
–0.81
–0.92
–0.735
Low Output Voltage
–1.95
–1.63
–1.95
–1.63
–1.95
–1.60
Vdc
High Input Voltage
–1.17
–0.84
–1.13
–0.81
–1.07
–0.735
Vdc
Low Input Voltage
–1.95
–1.48
–1.95
–1.48
–1.95
–1.45
Vdc
AC PARAMETERS
Propagation Delay
Select–to–Input
Data–to–Bus Output
Select–to–Bus
Output
OE–to–Bus Output
Bus–to–Input
RE–to–Input
Data–to–Receiver
Input
tpd
1.8
0.5
1.0
0.8
0.8
0.5
1.3
5.3
2.0
3.2
2.2
2.1
2.2
4.0
1.8
0.5
1.0
0.8
0.8
0.5
1.3
5.3
2.0
3.2
2.2
2.1
2.2
4.0
1.8
0.5
1.0
0.8
0.8
0.5
1.3
5.3
2.0
3.2
2.2
2.4
2.2
4.0
ns
Rise Time
tr
tf
0.5
2.0
0.5
2.0
0.5
2.0
ns
Fall Time
0.5
2.0
0.5
2.0
0.5
2.0
ns
DIP
PIN ASSIGNMENT
VCC
XBUS
WBUS
VCC0
X1
X0
W1
W0
VCC0
YBUS
ZBUS
OE
Y0
Y1
Z0
Z1
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
S
WIN
XIN
VEE
RE
ZIN
YIN
VCC0
16
15
14
13
9
10
11
12
NOTE:
Each MECL 10H series circuit has been designed
to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The
circuit is in a test socket or mounted on a printed
circuit board and transverse air flow greater than
500 Ifpm is maintained. Receiver outputs are
terminated through a 50–ohm resistor to –2.0 volts
dc. Bus outputs are terminated through a 25–ohm
resistor to –2.0 volts dc.
L SUFFIX
CERAMIC PACKAGE
CASE 758–02
P SUFFIX
PLASTIC PACKAGE
CASE 724–03
FN SUFFIX
PLCC
CASE 776–02
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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