參數(shù)資料
型號: MC10H115PG
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Quad Line Receiver
中文描述: QUAD LINE RECEIVER, PDIP16
封裝: LEAD FREE, PLASTIC, DIP-16
文件頁數(shù): 2/6頁
文件大?。?/td> 157K
代理商: MC10H115PG
MC10H115
http://onsemi.com
2
Figure 1. Logic Diagram
Figure 2. Pin Assignment
V
CC1
A
out
B
out
A
in
A
in
B
in
B
in
V
EE
V
CC2
D
out
C
out
D
in
D
in
C
in
C
in
VBB
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
2
5
7
4
3
6
14
11
13
10
15
9
12
*V
BB
to be used to supply bias to the MC10H115 only and
bypassed (when used) with 0.01 F to 0.1 F capacitor
to ground (0 V). V
BB
can source < 1.0 mA.
When input pin with bubble goes positive its respective
output pin with bubble goes positive.
V
BB
*
V
CC1
= Pin 1
V
CC2
= Pin 16
V
EE
= Pin 8
Pin assignment is for Dual
in
Line Package.
Table 1. MAXIMUM RATINGS
Symbol
Characteristic
Rating
Unit
V
EE
Power Supply (V
CC
= 0)
8.0 to 0
Vdc
V
I
Input Voltage (V
CC
= 0)
0 to V
EE
Vdc
I
out
Output Current
Continuous
Surge
50
100
mA
T
A
Operating Temperature Range
0 to +75
°
C
T
stg
Storage Temperature Range
Plastic
Ceramic
55 to +150
55 to +165
°
C
°
C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
(V
EE
=
5.2 V
±
5%) (Note 2)
0
°
25
°
75
°
Symbol
Characteristic
Min
Max
Min
Max
Min
Max
Unit
I
E
Power Supply Current
29
26
29
mA
I
inH
Input Current High
150
95
95
A
I
CBO
Input Leakage Current
1.5
1.0
1.0
A
V
BB
Reference Voltage
1.38
1.27
1.35
1.25
1.31
1.19
Vdc
V
OH
High Output Voltage
1.02
0.84
0.98
0.81
0.92
0.735
Vdc
V
OL
Low Output Voltage
1.95
1.63
1.95
1.63
1.95
1.60
Vdc
V
IH
High Input Voltage (Note 1)
1.17
0.84
1.13
0.81
1.07
0.735
Vdc
V
IL
Low Input Voltage (Note 1)
1.95
1.48
1.95
1.48
1.95
1.45
Vdc
V
CMR
Common Mode
Range (Note 3)
2.85 to
0.8
Vdc
V
PP
1. When V
is used as the reference voltage.
2. Each MECL 10H
series circuit has been designed to meet the specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50 resistor to
2.0 V.
3. Differential input not to exceed 1.0 Vdc.
4. 150 mV
p
p
differential input required to obtain full logic swing on output.
Input Sensitivity (Note 4)
150 typ
mV
PP
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