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參數(shù)資料
| 型號： | MC10EP11DTR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK BUFFER 1:2 3GHZ 8-TSSOP |
| 標準包裝： | 2,500 |
| 系列： | 10EP |
| 類型： | 扇出緩沖器（分配） |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 是/是 |
| 輸入： | ECL，PECL |
| 輸出： | ECL，PECL |
| 頻率 - 最大： | 3GHz |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-TSSOP，8-MSOP（0.118"，3.00mm 寬） |
| 供應商設(shè)備封裝： | 8-TSSOP |
| 包裝： | 帶卷 (TR) |
MC10EP11, MC100EP11
http://onsemi.com
6
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
IEE
Negative Power Supply Current
26
35
44
26
35
44
26
35
46
mA
VOH
Output HIGH Voltage (Note 19)
1145 1020
895
1145 1020
895
1145 1020
895
mV
VOL
Output LOW Voltage (Note 19)
1945 1820 1695 1945 1820 1695 1945 1820 1695
mV
VIH
Input HIGH Voltage (SingleEnded)
1225
880
1225
880
1225
880
mV
VIL
Input LOW Voltage (SingleEnded)
1945
1625 1945
1625
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 20)
VEE + 2.0
0.0
VEE + 2.0
0.0
VEE + 2.0
0.0
V
IIH
Input HIGH Current
150
mA
IIL
Input LOW Current
D
0.5
150
0.5
150
0.5
150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
18.Input and output parameters vary 1:1 with VCC.
19.All loading with 50 W to VCC 2.0 V.
20.VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = 3.0 V to 5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 21)
Symbol
Characteristic
40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fmax
Maximum Frequency (Figure 2)
> 3
GHz
tPLH,
tPHL
Propagation Delay to Output Differential
CLK to Q, Q
140
200
250
160
220
270
180
240
300
ps
tSKEW
Within Device Skew
Q0, Q1 (Note 22)
DevicetoDevice Skew
10
15
110
15
20
110
20
25
120
ps
tJITTER
Random Clock Jitter (RMS) (Figure 2)
0.2
< 1
0.2
< 1
0.2
< 1
ps
VINPP
Input Voltage Swing Sensitivity
(Differential Configuration)
150
800
1200
150
800
1200
150
800
1200
mV
tr
tf
Output Rise/Fall Times
Q, Q
(20% 80%) @ 1.0 GHz
70
120
170
80
130
180
90
150
200
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
21.Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC 2.0 V.
22.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.
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