參數(shù)資料
型號(hào): MC10123FN
廠商: ON SEMICONDUCTOR
元件分類: 總線收發(fā)器
英文描述: 10K SERIES, TRIPLE 1-BIT DRIVER, TRUE OUTPUT, PQCC20
封裝: PLASTIC, LCC-20
文件頁數(shù): 2/4頁
文件大?。?/td> 117K
代理商: MC10123FN
MC10123
http://onsemi.com
2
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Under
–30
°C
+25
°C
+85
°C
Characteristic
Symbol
Under
Test
Min
Max
Min
Typ
Max
Min
Max
Unit
Power Supply Drain Current
IE
8
82
71
75
82
mAdc
Input Current
IinH
4
350
220
Adc
IinL
4
0.5
Adc
Output Voltage
Logic 1
VOH
3
–1.060
–0.890
–0.960
–0.810
–0.890
–0.700
Vdc
Output Voltage
Logic 0
VOL
3
–2.100
–2.030
–2.100
–2.030
–2.100
–2.030
Vdc
Threshold Voltage
Logic 1
VOHA
3
–1.080
–0.980
–0.910
Vdc
Threshold Voltage
Logic 0
VOLA
3
–2.100
Vdc
Switching Times (50
Load)
ns
Propagation Delay
t4+3–
t4–3+
3
1.2
4.6
1.2
3.0
4.4
1.2
4.8
Rise Time
(20 to 80%)
t3+
3
1.0
3.7
1.0
2.5
3.5
1.0
3.9
Fall Time
(20 to 80%)
t3–
3
1.0
3.7
1.0
2.5
3.5
1.0
3.9
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature
VIHmax
VILmin
VIHAmin
VILAmax
VEE
–30
°C
–0.890
–1.890
–1.205
–1.500
–5.2
+25
°C
–0.810
–1.850
–1.105
–1.475
–5.2
+85
°C
–0.700
–1.825
–1.035
–1.440
–5.2
Pin
Under
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
(VCC)
Characteristic
Symbol
Under
Test
VIHmax
VILmin
VIHAmin
VILAmax
VEE
(VCC)
Gnd
Power Supply Drain Current
IE
8
4,5,6,7,9
10,11,12
13,14
8
1, 16
Input Current
IinH
4
8
1, 16
IinL
4
8
1, 16
Output Voltage
Logic 1
VOH
3
8
1, 16
Output Voltage
Logic 0
VOL
3
4,5,6,7
9,12
8
1, 16
Threshold Voltage
Logic 1
VOHA
3
4,5,6,7
8
1, 16
Threshold Voltage
Logic 0
VOLA
3
9,12
4,5,6,7
8
1, 16
Switching Times
(50
Load)
Pulse In
Pulse Out
–3.2 V
+2.0 V
Propagation Delay
t4+3–
t4–3+
3
4
3
8
1, 16
Rise Time
(20 to 80%)
t3+
3
4
3
8
1, 16
Fall Time
(20 to 80%)
t3–
3
4
3
8
1, 16
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
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