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參數(shù)資料
| 型號： | MC10121P |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | Hex Inverter Buffers/Drivers With Open-Collector High-Voltage Outputs 14-CDIP -55 to 125 |
| 中文描述： | 10K SERIES, 11-INPUT OR-AND/OR-AND-INVERT GATE, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 101K |
| 代理商： | MC10121P |
MC10121
3–75
MOTOROLA
MECL Data
DL122 — Rev 6
ELECTRICAL CHARACTERISTICS
(continued)
TEST VOLTAGE VALUES
(Volts)
@ Test Temperature
VIHmax
–0.890
VILmin
–1.890
VIHAmin
–1.205
VILAmax
–1.500
VEE
–5.2
–30
°
C
+25
°
C
–0.810
–1.850
–1.105
–1.475
–5.2
+85
°
C
–0.700
–1.825
–1.035
–1.440
–5.2
Pin
Under
Test
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
(VCC)
Gnd
Characteristic
Symbol
VIHmax
VILmin
VIHAmin
VILAmax
VEE
8
Power Supply Drain Current
IE
IinH
8
1, 16
Input Current
7
9
10
7
9
10
8
8
8
1, 16
1, 16
1, 16
IinL
7
9
10
7
9
10
8
8
8
1, 16
1, 16
1, 16
Output Voltage
Logic 1
VOH
3
2
4, 10, 13
8
8
1, 16
1, 16
Output Voltage
Logic 0
VOL
3
2
4, 10, 13
8
8
1, 16
1, 16
Threshold Voltage
Logic 1
VOHA
3
2
10, 13
4
4
8
8
1, 16
1, 16
Threshold Voltage
Logic 0
VOLA
3
2
10, 13
4
4
8
8
1, 16
1, 16
Switching Times
(50
Load)
+1.11V
Pulse In
Pulse Out
–3.2 V
+2.0 V
Propagation Delay
t4+3–
t4–3+
t4+2+
t4–2–
t3+
t2+
t3–
t2–
3
3
2
2
10, 13
10, 13
10, 13
10, 13
4
4
4
4
3
3
2
2
8
8
8
8
1, 16
1, 16
1, 16
1, 16
Rise Time
(20 to 80%)
3
2
10, 13
10, 13
4
4
3
2
8
8
1, 16
1, 16
Fall Time
(20 to 80%)
3
2
10, 13
10, 13
4
4
3
2
8
8
1, 16
1, 16
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
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