參數(shù)資料
型號: MC10113P
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Data Selectors/Multiplexers 24-CDIP -55 to 125
中文描述: 10K SERIES, QUAD 2-INPUT XOR GATE, PDIP16
封裝: PLASTIC, DIP-16
文件頁數(shù): 2/5頁
文件大小: 104K
代理商: MC10113P
MC10113
3–49
MOTOROLA
MECL Data
DL122 — Rev 6
ELECTRICAL CHARACTERISTICS
Pin
Under
Test
Test Limits
–30
°
C
+25
°
C
+85
°
C
Characteristic
Symbol
Min
Max
Min
Typ
Max
Min
Max
Unit
Power Supply Drain Current
IE
IinH
8
46
42
46
mAdc
Input Current
4,7,10,13
5,6,11,12
9
425
350
870
265
220
545
265
220
545
μ
Adc
IinL
VOH
*
0.5
0.5
0.3
μ
Adc
Output Voltage
Logic 1
2
3
14
15
–1.060
–1.060
–1.060
–1.060
–0.890
–0.890
–0.890
–0.890
–0.960
–0.960
–0.960
–0.960
–0.810
–0.810
–0.810
–0.810
–0.890
–0.890
–0.890
–0.890
–0.700
–0.700
–0.700
–0.700
Vdc
Output Voltage
Logic 0
VOL
2
3
14
15
–1.890
–1.890
–1.890
–1.890
–1.675
–1.675
–1.675
–1.675
–1.850
–1.850
–1.850
–1.850
–1.650
–1.650
–1.650
–1.650
–1.825
–1.825
–1.825
–1.825
–1.615
–1.615
–1.615
–1.615
Vdc
Threshold Voltage
Logic 1
VOHA
2
3
14
15
–1.080
–1.080
–1.080
–1.080
–0.980
–0.980
–0.980
–0.980
–0.910
–0.910
–0.910
–0.910
Vdc
Threshold Voltage
Logic 0
VOLA
2
3
14
15
–1.655
–1.655
–1.655
–1.655
–1.630
–1.630
–1.630
–1.630
–1.595
–1.595
–1.595
–1.595
Vdc
Switching Times
(50
Load)
Min
Typ
Max
ns
Propagation Delay
t4+2+
t4–2–
t9+2–
t9–2+
t2+
t2–
2
2
2
2
1.1
1.1
1.3
1.3
4.7
4.7
5.2
5.2
1.3
1.3
1.5
1.5
2.6
2.6
3.4
3.4
4.5
4.5
5.0
5.0
1.3
1.3
1.5
1.5
5.0
5.0
5.5
5.5
Rise Time
(20 to 80%)
2
1.1
4.2
1.1
2.5
3.9
1.1
4.4
Fall Time
(20 to 80%)
2
1.1
4.2
1.1
2.5
3.9
1.1
4.4
* Individually test each input applying VIH or VIL to input under test.
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