參數(shù)資料
型號(hào)： MC10104L
廠商： MOTOROLA INC
元件分類(lèi)： 通用總線功能
英文描述： Quad 2-Input AND Gate
中文描述： 10K SERIES, QUAD 2-INPUT AND GATE, CDIP16
封裝： CERAMIC, DIP-16
文件頁(yè)數(shù)： 1/5頁(yè)
文件大?。?/td> 102K
代理商： MC10104L
SEMICONDUCTOR TECHNICAL DATA
3–16
REV 5
Motorola, Inc. 1996
3/93
The MC10104 is a quad 2–input AND gate. One of the gates has both
AND/NAND outputs available.
PD= 35 mW typ/gate (No Load)
tpd= 2.7 ns typ
tr, tf= 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE= PIN 8
14
13
12
11
10
3
7
6
2
5
4
9
15
DIP
PIN ASSIGNMENT
VCC1
AOUT
BOUT
AIN
AIN
BIN
BIN
VEE
VCC2
DOUT
COUT
DIN
DIN
CIN
CIN
DOUT
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
相關(guān)PDF資料
PDF描述
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MC10105L Retriggerable Monostable Multivibrators 16-CFP -55 to 125
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