參數資料
| 型號： | MC100LVEL40DWG |
| 廠商： | ON Semiconductor |
| 文件頁數： | 1/6頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DETECT PHASE FREQ ECL 20SOIC |
| 標準包裝： | 38 |
| 系列： | 100LVEL |
| 類型： | 相頻探測器 |
| PLL： | 無 |
| 輸入： | CML，LVDS，NECL，PECL |
| 輸出： | ECL |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 1:3 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 250MHz |
| 除法器/乘法器： | 無/無 |
| 電源電壓： | ±3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SOIC（0.295"，7.50mm 寬） |
| 供應商設備封裝： | 20-SOIC |
| 包裝： | 管件 |
| 其它名稱： | MC100LVEL40DWGOS |
Semiconductor Components Industries, LLC, 2006
November, 2006 Rev. 8
1
Publication Order Number:
MC100LVEL40/D
MC100LVEL40
3.3/5VECL Differential
PhaseFrequency Detector
Description
The MC100LVEL40 is a three state phase frequencydetector
intended for phaselocked loop applications which require a minimum
amount of phase and frequency difference at lock. Advanced design
significantly reduces the dead zone of the detector. For proper
operation, the input edge rate of the R and V inputs should be less than
5 ns. The device is designed to work with a 3.3 V power supply.
When the reference (R) and the feedback (FB) inputs are unequal in
frequency and/or phase the differential up (U) and down (D) outputs
will provide pulse streams which when subtracted and integrated
provide an error voltage for control of a VCO.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
For application information, refer to AND8040/D, “Phase Lock
Loop Operation.”
The 100 Series Contains Temperature Compensation
Features
250 MHz Typical Bandwidth
PECL Mode Operating Range:
VCC = 3.0 V to 5.5 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = 3.0 V to 5.5 V
Internal Input Pulldown Resistor
PbFree Packages are Available*
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING
DIAGRAM
SO20
DW SUFFIX
CASE 751D
1
20
http://onsemi.com
A
= Assembly Location
WL
= Wafer Lot
YY
= Year
WW
= Work Week
G= PbFree Package
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
20
1
100LVEL40
AWLYYWWG
相關PDF資料 |
PDF描述 |
|---|---|
| MC100LVEL56DWR2G | IC MUX 2:1 DUAL DIFF ECL 20-SOIC |
| MC100LVEP05DG | IC GATE AND/NAND ECL 2INP 8SOIC |
| MC100LVEP111MNRG | IC CLK BUFF MUX 2:10 3GHZ 32-QFN |
| MC100LVEP14DT | IC CLOCK BUFFER MUX 2:5 20-TSSOP |
| MC100LVEP210MNG | IC CLOCK BUFFER 1:5 3GHZ 32-QFN |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC100LVEL40DWR2 | 功能描述:相位探測器 / 移相器 3.3V/5V ECL Diff RoHS:否 制造商:M/A-COM Technology Solutions 封裝 / 箱體:PQFN-24 封裝:Reel |
| MC100LVEL40DWR2G | 功能描述:相位探測器 / 移相器 3.3V/5V ECL Diff Phase Freq. Detector RoHS:否 制造商:M/A-COM Technology Solutions 封裝 / 箱體:PQFN-24 封裝:Reel |
| MC100LVEL51D | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100LVEL51DG | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type w/Diff Clock RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100LVEL51DR2 | 功能描述:觸發(fā)器 3.3V/5V ECL D-Type RoHS:否 制造商:Texas Instruments 電路數量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
發(fā)布緊急采購，3分鐘左右您將得到回復。