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參數(shù)資料
| 型號(hào)： | MC100H660FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 4-Bit ECL/TTL Load Reducing DRAM Driver |
| 中文描述： | ECL TO TTL TRANSLATOR, TRUE OUTPUT, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 114K |
| 代理商： | MC100H660FN |
SEMICONDUCTOR TECHNICAL DATA
2–121
REV 5
Motorola, Inc. 1996
3/93
The MC10H/100H660 is a 4–bit ECL input, translating DRAM address
driver, ideally suited for driving TTL compatible DRAM inputs from an ECL
system. It is designed for use in high capacity, highly interleaved DRAM
memory boards, that directly interface to a high speed, pipelined ECL bus
interface, where new operations may be initiated to the board at up to a 50
MHz rate.
The latch provides the capability for the memory controller to propagate
new addresses to different banks without having to wait for the address timing
constraints to be satisfied from a previous memory operation. The dual output
fanout reduces input loading from the controller by a factor of two, thus
significantly improving board etch propagation delays from the controller,
without the need for additional ECL buffering.
The H660 features special TTL outputs which do not have an IOS limiting
resistor, therefore allowing rapid charging of the load capacitance. Output
voltage levels are designed specifically for driving DRAM inputs. The output
stages feature separate power and ground pins to isolate output switching
noise from internal circuitry, and also to improve simultaneous switching
performance.
The 10H version is compatible with MECL 10H ECL logic levels. The
100H version is compatible with 100K levels.
High Capacitive Drive Outputs to Drive DRAM Address Inputs
Extra TTL and ECL Power/Ground Pins to Minimize Switching Noise
Dual Supply
10.7 ns Max. D to Q into 300 pF
PIN NAMES
PIN
FUNCTION
OGND[0:3]
OVT01, OVT23
IGND01, IGND23
IVT01, IVT23
VEE
VCCE
D[0:3]
Q[0:3]A, Q[0:3]B
LEN
R
Output Ground (0V)
Output VCCT (+5.0 V)
Internal TTL Ground (OV)
Internal TTL VCCT (+5.0 V)
ECL Neg. Supply (–5.2/ –4.5 V)
ECL Ground (0V)
Data Inputs (ECL)
Data Outputs (TTL levels)
Latch Enable (ECL)
Reset (ECL)
Q
O
Q
O
Q
O
Q
I
I
V
V
D
L
D
1
5
6
7
8
9
10
11
25
24
23
22
21
20
19
Pinout: 28–Lead PLCC
(Top View)
26
27
28
2
3
4
12
13
14
15
16
17
18
Q1B
OGND1
Q1A
OVT01
Q0B
OGND0
Q0A
IVT23
IGND23
VCCE
VCCE
D3
D2
R
FN SUFFIX
PLASTIC PACKAGE
CASE 776–02
EN
LOGIC SYMBOL
D
ENR
Q
Q0A
OGND0
Q0B
D
Q1A
OGND1
Q1B
R
Q
D
ENR
Q
Q2A
OGND2
Q2B
D
ENR
Q
Q3A
OGND3
Q3B
IGND01
IVT01
IVT23
IGND23
OVT01
ECL Inputs
DRAM Driver
Outputs
VEE
VCCE
D0
D1
D2
D3
LEN
R
OVT23
D
L
H
X
X
LEN
H
H
L
X
R
L
L
L
H
Q
L
H
Q0
L
TRUTH TABLE
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| MC12028AD | MECL PLL COMPONENTS ±64/65, ±128/129 DUAL MODULUS PRESCALER |
| MC12028 | MECL PLL COMPONENTS ±64/65, ±128/129 DUAL MODULUS PRESCALER |
| MC12028A | MECL PLL COMPONENTS ±64/65, ±128/129 DUAL MODULUS PRESCALER |
| MC12028B | MECL PLL COMPONENTS ±64/65, ±128/129 DUAL MODULUS PRESCALER |
| MC12028AP | MECL PLL COMPONENTS ±64/65, ±128/129 DUAL MODULUS PRESCALER |
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| MC100H680FN | 功能描述:總線收發(fā)器 4-Bit Diff ECL / TTL RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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| MC100KLT22DG | 制造商:ON SEM 功能描述: |
| MC100KLT23DG | 制造商:ON SEM 功能描述: |
| MC100LEVL14DW | 制造商:ON Semiconductor 功能描述: |
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