參數(shù)資料
型號(hào): MC100ES8223TC
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 時(shí)鐘及定時(shí)
英文描述: 100E SERIES, LOW SKEW CLOCK DRIVER, 22 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64
封裝: PLASTIC, LQFP-64
文件頁(yè)數(shù): 5/8頁(yè)
文件大?。?/td> 447K
代理商: MC100ES8223TC
MC100ES8223
TIMING SOLUTIONS
5
MOTOROLA
Table 6. AC Characteristics (VCC = 3.3V±5%, VCCO = 1.5V±0.1V or VCCO = 1.8V±0.1V, TJ = 0°C to + 110°C)a b
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Clock input pair HCLK, HCLK (HSTL differential signals)
VDIF
Differential input voltagec (peak-to-peak)
0.4
V
VX, IN
Differential cross point voltaged
0.68
0.9
V
fCLK
Input Frequency
0-800
TBD
MHz
tPD
Propagation Delay HCLK0 to Q[0-21]
TBD
ps
Clock input pair PCLK, PCLK (PECL differential signals)
VPP
Differential input voltagee (peak-to-peak)
0.2
1.0
V
VCMR
Differential input crosspoint voltagef
1
VCC-0.6
V
fCLK
Input Frequency
0-800
MHz
Differential
tPD
Propagation Delay PCLK0 to Q[0-21]
TBD
ps
Differential
HSTL clock outputs (Q[0-21], Q[0-21])
VX, OUT
Output differential crosspoint
0.68
0.75
0.9
V
VOH
Output High Voltage
1
V
VOL
Output Low Voltage
0.5
V
VO(P-P)
Differential output voltage (peak-to-peak)
0.5
V
tsk(O)
Output-to-output skew
50
ps
Differential
tsk(PP)
Output-to-output skew (part-to-part)
TBD
ps
Differential
tJIT(CC)
Output cycle-to-cycle jitter
TBD
DCO
Output duty cycle
TBD
50
TBD
%
DCfref= 50%
tr, tf
Output Rise/Fall Time
0.05
TBD
ns
20% to 80%
a.
DC characteristics are design targets and pending characterization.
b.
AC characteristics apply for parallel output termination of 50
to VTT.
c.
VDIF (DC) is the minimum differential HSTL input voltage swing required for device functionality.
d.
VX (DC) is the crosspoint of the differential HSTL input signal. Functional operation is obtained when the crosspoint is within the VX (DC)
range and the input swing lies within the VDIF (DC) specification.
e.
VPP (AC) is the minimum differential PECL input voltage swing required to maintain AC characteristics including tpd and device-to-device
skew.
f.
VCMR (AC) is the crosspoint of the differential HSTL input signal. Normal AC operation is obtained when the crosspoint is within the VCMR
(AC) range and the input swing lies within the VPP (AC) specification. Violation of VCMR (AC) or VPP (AC) impacts the device propagation
delay, device and part-to-part skew.
Figure 3. MC100ES8223 AC test reference
Differential
Pulse Generator
Z = 50
W
RT = 50
ZO = 50
DUT
MC100ES8223
VTT
RT = 50
ZO = 50
VTT
tPD (HCLK to Q[0–21])
Figure 4. MC100ES8223 AC reference
measurement waveform
VX=0.75V
VDIF=1.0V
HCLK
Q[0–21]
tPD (PCLK to Q[0–21])
VCMR=VCC-1.3V
VPP=0.8V
PCLK
Q[0–21]
Figure 5. MC100ES8223 AC reference
measurement waveform
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
MC100ES8223
Low Voltage 1:22 Differential HSTL Clock Fanout Buffer
NETCOM
IDT Low Voltage 1:22 Differential HSTL Clock Fanout Buffer
Freescale Timing Solutions Organization has been acquired by Integrated Device Technology, Inc
MC100ES8223
5
相關(guān)PDF資料
PDF描述
MC100H643FNR2 100H SERIES, LOW SKEW CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
MC100H644FNR2 100H SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 2 INVERTED OUTPUT(S), PQCC20
MC100LVEL29DWR2 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
MC100LVEL31D 100LVEL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
MC10101FN 10K SERIES, QUAD 1-INPUT INV/NINV GATE, PQCC20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC100H600FN 功能描述:轉(zhuǎn)換 - 電壓電平 9-Bit TTL to ECL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
MC100H600FNG 功能描述:轉(zhuǎn)換 - 電壓電平 9-Bit TTL to ECL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
MC100H600FNR2 功能描述:轉(zhuǎn)換 - 電壓電平 9-Bit TTL to ECL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
MC100H600FNR2G 功能描述:轉(zhuǎn)換 - 電壓電平 9-Bit TTL to ECL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8
MC100H601FN 功能描述:轉(zhuǎn)換 - 電壓電平 9-Bit ECL to TTL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8