參數(shù)資料
型號: MC100ES6111FAR2
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 時鐘及定時
英文描述: 100E SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
封裝: PLASTIC, LQFP-32
文件頁數(shù): 6/7頁
文件大?。?/td> 285K
代理商: MC100ES6111FAR2
7
MC100ES6111
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
682
Table 7. AC Characteristics (ECL: VEE = -3.3V
± 5% or V
EE = -2.5V
± 5%, V
CC = GND) or
(HSTL/PECL: VCC = 3.3V
± 5% or V
CC = 2.5V
± 5%, V
EE = GND, TJ = 0°C to + 110°C)
a
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
Clock input pair CLKA, CLKA (PECL or ECL differential signals)
VPP
Differential input voltageb (peak-to-peak)
0.15
1.3
V
VCMR
Differential input crosspoint voltagec
PECL
VEE + 1.0
VCC - 0.3
V
fCLK
Input Frequencyd
2.7
GHz
Differential
tPD
Propagation Delay CLKA or CLKB to Q0-9
280
400
530
ps
Differential
Clock input pair CLKB, CLKB (HSTL differential signals)
VDIF
Differential input voltagee (peak-to-peak)e
0.4
1.0
V
VX
Differential input crosspoint voltagef
VEE + 0.68
VEE + 0.9
V
fCLK
Input Frequency
2.7
GHz
Differential
tPD
Propagation Delay CLKB to Q0-9
280
400
530
ps
Differential
ECL clock outputs (Q0-9, Q0-9)
VO(P-P)
Differential output voltage (peak-to-peak)
fO < 300 MHz
fO < 1.5 GHz
fO < 2.7 GHz
0.45
0.3
TBD
0.72
0.55
0.37
0.95
V
tsk(O)
Output-to-output skew
35
ps
Differential
tsk(PP)
Output-to-output skew (part-to-part)
250
ps
Differential
tJIT(CC)
Output cycle-to-cycle jitter
TBD
tsk(P)
Output Pulse skewg
75
ps
tr, tf
Output Rise/Fall Time
0.05
0.3
ns
20% to 80%
a. AC characteristics apply for parallel output termination of 50
to VTT
b. VPP (AC) is the minimum differential ECL/PECL input voltage swing required to maintain AC characteristics including tpd and device-to-de-
vice skew
c. VCMR (AC) is the crosspoint of the differential ECL/PECL input signal. Normal AC operation is obtained when the crosspoint is within the
VCMR (AC) range and the input swing lies within the VPP (AC) specification. Violation of VCMR (AC) or VPP (AC) impacts the device propa-
gation delay, device and part-to-part skew
d. The MC100ES6111 is fully operational up to 3.0 GHz and is characterized up to 2.7 GHz.
e. VDIF (AC) is the minimum differential HSTL input voltage swing required to maintain AC characteristics including tpd and device-to-device
skew.
f.
VX (AC) is the crosspoint of the differential HSTL input signal. Normal AC operation is obtained when the crosspoint is within the VX (AC)
range and the input swing lies within the V DIF (AC) specification. Violation of VX (AC) or VDIF (AC) impacts the device propagation delay,
device and part-to-part skew
g. Output pulse skew is the absolute difference of the propagation delay times: | tPLH – tPHL |.
Figure 1. MC100ES6111 AC test reference
Differential
Pulse Generator
Z = 50W
RT = 50
ZO = 50
DUT
MC100ES6111
VTT
RT = 50
ZO = 50
VTT
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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