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參數(shù)資料
| 型號(hào)： | MC100EP91MNG |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator |
| 中文描述： | TRIPLE ECL TO PECL TRANSLATOR, COMPLEMENTARY OUTPUT, QCC24 |
| 封裝： | 4 X 4 MM, LEAD FREE, QFN-24 |
| 文件頁(yè)數(shù)： | 8/10頁(yè) |
| 文件大?。?/td> | 174K |
| 代理商： | MC100EP91MNG |
MC100EP91
http://onsemi.com
8
ORDERING INFORMATION
Device
Package
Shipping
MC100EP91DW
SO
20
38 Units / Rail
MC100EP91DWG
SO
20
(Pb
Free)
38 Units / Rail
MC100EP91DWR2
SO
20
1000 / Tape & Reel
MC100EP91DWR2G
SO
20
(Pb
Free)
1000 / Tape & Reel
MC100EP91MN
QFN
24
92 Units / Rail
MC100EP91MNG
QFN
24
(Pb
Free)
92 Units / Rail
MC100EP91MNR2
QFN
24
3000 / Tape & Reel
MC100EP91MNR2G
QFN
24
(Pb
Free)
3000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Figure 12. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
Q
D
Q
D
Z
o
= 50
Z
o
= 50
50
50
V
TT
V
TT
= GND
2.0 V
Resource Reference of Application Notes
AN1405/D
ECL Clock Distribution Techniques
AN1406/D
Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPS
I/O SPiCE Modeling Kit
AN1504/D
Metastability and the ECLinPS Family
AN1568/D
Interfacing Between LVDS and ECL
AN1642/D
The ECL Translator Guide
AND8001/D
Odd Number Counters Design
AND8002/D
Marking and Date Codes
AND8020/D
Termination of ECL Logic Devices
AND8066/D
Interfacing with ECLinPS
AND8090/D
AC Characteristics of ECL Devices
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC100EP91MNR2 | 2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator |
| MC100EP91MNR2G | 2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator |
| MC100EP91 | 2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator |
| MC100EP91DW | 2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator |
| MC100EP91DWG | 2.5 V/3.3 V Any Level Positive Input to -3.3 V/-5.5 V NECL Output Translator |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100EP91MNR2 | 制造商:ON Semiconductor 功能描述:TRANSLATOR HSTL/ LVCMOS/CML/LVDS/LVPECL/LVTTL TO NECL 24QFN - Tape and Reel |
| MC100EP91MNR2G | 功能描述:轉(zhuǎn)換 - 電壓電平 PECL TO NECL TRNSLTR RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC100EPT20 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3VLVTTL/LVCMOS to Differential LVPECL Translator |
| MC100EPT20D | 功能描述:轉(zhuǎn)換 - 電壓電平 3.3V TTL/CMOS to RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
| MC100EPT20DG | 功能描述:轉(zhuǎn)換 - 電壓電平 3.3V TTL/CMOS to Diff PECL RoHS:否 制造商:Micrel 類型:CML/LVDS/LVPECL to LVCMOS/LVTTL 傳播延遲時(shí)間:1.9 ns 電源電流:14 mA 電源電壓-最大:3.6 V 電源電壓-最小:3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MLF-8 |
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