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參數(shù)資料
| 型號： | MC100EP446FAR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter |
| 中文描述： | 100E SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, COMPLEMENTARY OUTPUT, PQFP32 |
| 封裝： | LEAD FREE, PLASTIC, LQFP-32 |
| 文件頁數(shù)： | 14/20頁 |
| 文件大?。?/td> | 278K |
| 代理商： | MC100EP446FAR2G |
MC10EP446, MC100EP446
http://onsemi.com
14
The device also features a differential SYNC input (Pins 29 and 30), which asynchronously reset all internal flip–flops and
clock circuitry on the rising edge of SYNC. The release of SYNC is a synchronous process, which ensures that no runt serial
data bits are generated. The falling edge of the SYNC followed by a falling edge of CLK initiates the start of the conversion
process on the next rising edge of CLK (Figures 9 and 10). As shown in the figures below, the device will start to latch the
parallel input data after the a falling edge of SYNC , followed by the falling edge CLK , on the next rising of edge of CLK
for CKSEL LOW
Figure 9. Timing Diagram 1:8 Parallel to Serial Conversion with CKSEL LOW and SYNC
CLK
SYNC
SOUT
PCLK
D0
D0
2
D1
D2
D3
D4
D5
D6
D7
D2
2
D3
2
D4
2
D5
2
D6
2
D7
2
D0
3
D1
3
D2
3
D3
3
D4
3
D5
3
D6
3
D7
3
D1
2
CKSEL
D
1
D
1
D
1
D
1
D
1
D
1
D
1
D
1
D
2
D
2
D
2
D
2
D
2
D
2
D0
1
D2
1
D3
1
D4
1
D5
1
D6
1
D7
1
D1
1
D
2
D0
4
D1
4
D2
4
D3
4
D4
4
D5
4
D6
4
D7
4
1
2
3
4
5
6
7
Data Latched
Data Latched
Data Latched
Data Latched
Figure 10. Synchronous Release of SYNC for CKSEL LOW
CLK
SYNC
SYNC
(Asynchronous RESET)
SYNC
(Synchronous ENABLE)
Number of Clock Cycles from Data Latch to SOUT
相關PDF資料 |
PDF描述 |
|---|---|
| MC100EP52DG | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52DR2G | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52DTG | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
| MC100EP52DTR2G | 3.3V / 5V ECL Differential Data and Clock D Flip−Flop |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MC100EP446MNG | 功能描述:串行到并行邏輯轉換器 ECL PARA T/SERIAL RoHS:否 制造商:Supertex 工作電源電壓: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
| MC100EP446MNR4G | 功能描述:串行到并行邏輯轉換器 ECL PARA T/SERIAL RoHS:否 制造商:Supertex 工作電源電壓: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-32 封裝:Tray |
| MC100EP451 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5VECL 6-Bit Differential Register with Master Reset |
| MC100EP451FA | 功能描述:觸發(fā)器 3.3V/5V ECL 6-Bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| MC100EP451FAG | 功能描述:觸發(fā)器 3.3V/5V ECL 6-Bit Diff w/Master Reset RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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