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參數(shù)資料
| 型號： | MC100EP35MNR4G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | 3.3V / 5V ECL JK Flip−Flop |
| 中文描述： | 100E SERIES, POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, DSO8 |
| 封裝： | LEAD FREE, DFN-8 |
| 文件頁數(shù)： | 2/11頁 |
| 文件大小： | 164K |
| 代理商： | MC100EP35MNR4G |
MC10EP35, MC100EP35
http://onsemi.com
2
1
2
3
4
5
6
7
8
Q
V
EE
V
CC
Figure 1. 8
Lead Pinout
(Top View)
and Logic Diagram
K
Q
CLK
RESET
J
J
K
R
Flip Flop
Table 1. PIN DESCRIPTION
PIN
CLK*
J*, K*
ECL Signal Inputs
FUNCTION
ECL Clock Inputs
RESET*
ECL Asynchronous Reset
Q, Q
ECL Data Outputs
Table 2. TRUTH TABLE
J
L-
L-
H-
H-
X
K
L-
H
L
H
X
RESET
L
L
L
L
H
CLK
Z
Z
Z
Z
X
Qn+1
Qn
L
H
Qn
L
Z = LOW to HIGH Transition
V
CC
Positive Supply
V
EE
EP
Negative Supply
Exposed pad must be connected to a
sufficient thermal conduit. Electrically
connect to the most negative supply or
leave floating open.
* Pins will default LOW when left open.
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 k
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb Pkg
Pb
Free Pkg
SOIC
8
TSSOP
8
DFN8
Level 1
Level 1
Level 1
Level 1
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL
94 V
0 @ 0.125 in
Transistor Count
77 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
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相關代理商/技術參數(shù) |
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| MC100EP40 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5VECL Differential Phase-Frequency Detector |
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| MC100EP40DT | 功能描述:相位探測器 / 移相器 3.3V/5V ECL Diff RoHS:否 制造商:M/A-COM Technology Solutions 封裝 / 箱體:PQFN-24 封裝:Reel |
| MC100EP40DTG | 功能描述:相位探測器 / 移相器 3.3V/5V ECL Diff Phase Freq. Detector RoHS:否 制造商:M/A-COM Technology Solutions 封裝 / 箱體:PQFN-24 封裝:Reel |
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