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參數資料
| 型號： | MC100EP221TB |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 100E SERIES, LOW SKEW CLOCK DRIVER, 20 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP52 |
| 封裝： | PLASTIC, LQFP-52 |
| 文件頁數： | 4/8頁 |
| 文件大小： | 308K |
| 代理商： | MC100EP221TB |
6
MC100EP221
MOTOROLA ADVANCED CLOCK DRIVERS DEVICE DATA
642
Table 4: PECL and HSTL DC Characteristics (VCCO = VCC = 2.375V to 3.8V, VEE = GND)
Symbol
Characteristics
TA = -40°C
TA = 25°C
TA = 85°C
Unit
Condition
y
Min
Max
Min
Max
Min
Max
Clock input pair CLK0, CLK0, CLK1, CLK1a (LVPECL differential signals)
VPP
Differential input
voltageb
VCC=3.3V
VCC=2.5V
0.10
0.15
0.10
0.15
0.10
0.15
V
VCMR
Differential cross point
voltagec
CLK0
CLK1
1.0
0.1
VCC-0.4
VCC-1.0
1.0
0.1
VCC-0.4
VCC-1.0
1.0
0.1
VCC-0.4
VCC-1.0
V
Clock input pair CLK1, CLK1d (HSTL differential signals)
VDIF
Differential input
voltagee
VCC=3.3V
VCC=2.5V
0.4
1.0
0.4
1.0
0.4
1.0
V
VX
Differential cross point
voltagef
0.68
0.9
0.68
0.9
0.68
0.9
V
VIH
Input high voltage
VX+0.2
VX+0.5
VX+0.2
VX+0.5
VX+0.2
VX+0.5
V
VIL
Input low voltage
VX-0.5
VX-0.2
VX-0.5
VX-0.2
VX-0.5
VX-0.2
V
All inputs (LVPECL single ended signals)
VIH
Input high voltage
VCC-1.165
VCC-0.880
VCC-1.165
VCC-0.880
VCC-1.165
VCC-0.880
V
VIL
Input low voltage
VCC-1.810
VCC-1.480
VCC-1.810
VCC-1.480
V-1.810
VCC-1.480
V
IIH
Input Current
150
A
VIN = VCC to
VEE
LVPECL clock outputs (Q0-19, Q0-19)
VOH
Output High Voltage
VCC-1.20
VCC-0.82
VCC-1.15
VCC-0.82
VCC-1.15
VCC-0.82
V
IOH= -30mAg
VOL
Output Low Voltage
VCC-1.90
VCC-1.40
VCC-1.90
VCC-1.40
VCC-1.9
VCC-1.40
V
IOL= -5mAg
Supply current and VBB
IEE
Max. Supply Current
190
mA
VEE pin
ICC
Max. Supply Currenth
750
mA
VCC pins
VBB
Output reference
voltagei
VCC=3.3V
VCC=2.5V
VCC-1.35
VCC-1.24
VCC-1.35
VCC-1.24
VCC-1.22
VCC-1.35
VCC-1.24
VCC-1.22
V
a. The input pairs CLK0, CLK1 are compatible to differential signaling standards. CLK0 is compatible to LVPECL signals and CLK1 meets
both HSTL and LVPECL differential signal specifications. The difference between CLK0 and CLK1 is the differential input threshold voltage
(VCMR).
b. VPP is the minimum differential input voltage swing required to maintain device functionality.
c. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC)
range and the input swing lies within the VPP (DC) specification.
d. Clock inputs driven by differential HSTL compatible signals. Only applicable to CLK1, CLK1.
e. VDIF (DC) is the minimum differential HSTL input voltage swing required for device functionality. Only applicable to CLK1, CLK1.
f.
VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR (DC)
range and the input swing lies within the VPP (DC) specification.
g. Equivalent to an output termination of 50
to VTT.
h. ICC includes current through the output resistors (all outputs terminated 50W to VTT).
i.
VBB output can be used to bias the complementary input when the device is used with single ended clock signals. VBB can sink max. 0.3
mA DC current.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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