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參數(shù)資料
| 型號(hào)： | MC100EP195BFAR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 12/17頁 |
| 文件大小： | 0K |
| 描述： | IC DELAY LINE 1024TAP 32-LQFP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | 100EP |
| 標(biāo)片/步級(jí)數(shù)： | 1024 |
| 功能： | 可編程 |
| 延遲到第一抽頭： | 2.5ns |
| 接頭增量： | 10ps |
| 可用的總延遲： | 2.2ns ~ 12.2ns |
| 獨(dú)立延遲數(shù)： | 1 |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-LQFP（7x7） |
| 包裝： | 帶卷 (TR) |
MC100EP195B
http://onsemi.com
4
Table 2. CONTROL PIN
Pin
State
Function
EN
LOW (Note 3)
Input Signal is Propagated to the Output
HIGH
Output Holds Logic Low State
LEN
LOW (Note 3)
Transparent or LOAD mode for real time delay values present on D[0:10].
HIGH
LOCK and HOLD mode for delay values on D[0:10]; further changes on D[0:10]
are not recognized and do not affect delay.
SETMIN
LOW (Note 3)
Output Delay set by D[0:10]
HIGH
Set Minimum Output Delay
SETMAX
LOW (Note 3)
Output Delay set by D[0:10]
HIGH
Set Maximum Output Delay
D10
LOW (Note 3)
CASCADE Output LOW, CASCADE Output HIGH
HIGH
CASCADE Output LOW, CASCADE Output HIGH
3. Internal pulldown resistor will provide a logic LOW if pin is left unconnected.
Table 3. CONTROL D[0:10] INTERFACE
VCF
ECL Mode
VCF
No Connect
LVCMOS Mode
VCF
1.5 V $ 100 mV
LVTTL Mode (Note 5)
4. Short VCF (pin 8) and VEF (pin 7).
5. When Operating in LVTTL Mode, the reference voltage can be provided by connecting an external resistor, RCF (suggested resistor value
is 2.2 kW $5%), between VCF and VEE pins.
Table 4. DATA INPUT ALLOWED OPERATING VOLTAGE MODE TABLE
POWER SUPPLY
CONTROL DATA SELECT INPUTS PINS (D [0:10])
LVCMOS
LVTTL
LVPECL
LVNECL
PECL Mode Operating Range
YES
N/A
NECL Mode Operating Range
N/A
YES
Table 5. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
(R1)
75 kW
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 2 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 6)
PbFree Pkg
QFN32
Level 1
LQFP32
Level 2
Flammability Rating Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
Transistor Count
1217 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
6. For additional information, see Application Note AND8003/D.
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| MC100EP195BMNG | 功能描述:延遲線/計(jì)時(shí)元素 PROGR DELAY CHIP RoHS:否 制造商:Micrel 功能:Active Programmable Delay Line 傳播延遲時(shí)間:1000 ps 工作溫度范圍: 封裝 / 箱體:QFN-24 封裝:Tube |
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