Shipping MC100EP16FD SOIC8 98 Units /" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� MC100EP16FD
寤犲晢锛� ON Semiconductor
鏂囦欢闋佹暩(sh霉)锛� 8/10闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC RCVR/DRVR ECL DIFF 5V 8SOIC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 98
绯诲垪锛� 100EP
閭忚集椤炲瀷锛� 宸垎鎺ユ敹鍣�/椹�(q奴)鍕�(d貌ng)鍣�
闆绘簮闆诲锛� 3 V ~ 5.5 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 8-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 8-SOICN
鍖呰锛� 绠′欢
鍏跺畠鍚嶇ū锛� MC100EP16FDOS
MC100EP16F
http://onsemi.com
7
ORDERING INFORMATION
Device
Package
Shipping
MC100EP16FD
SOIC8
98 Units / Rail
MC100EP16FDG
SOIC8
(PbFree)
98 Units / Rail
MC100EP16FDR2
SOIC8
2500 / Tape & Reel
MC100EP16FDR2G
SOIC8
(PbFree)
2500 / Tape & Reel
MC100EP16FDT
TSSOP8
100 Units / Rail
MC100EP16FDTG
TSSOP8
(PbFree)
100 Units / Rail
MC100EP16FDTR2
TSSOP8
2500 / Tape & Reel
MC100EP16FDTR2G
TSSOP8
(PbFree)
2500 / Tape & Reel
MC100EP16FMNR4
DFN8
1000 / Tape & Reel
MC100EP16FMNR4G
DFN8
(PbFree)
1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D
ECL Clock Distribution Techniques
AN1406/D
Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D
Metastability and the ECLinPS Family
AN1568/D
Interfacing Between LVDS and ECL
AN1672/D
The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
MS27473E18F11P CONN PLUG 11POS STRAIGHT W/PINS
MC100EP16TD IC RCVR/DRVR ECL DIFF 5V 8SOIC
VE-J7N-MX-F1 CONVERTER MOD DC/DC 18.5V 75W
MC100EL16DT IC RCVR ECL DIFFERENTL 5V 8TSSOP
VE-J7M-MX-F4 CONVERTER MOD DC/DC 10V 75W
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
MC100EP16FDG 鍔熻兘鎻忚堪:绺界窔鏀剁櫦(f膩)鍣� 3.3V/5V ECL Diff RoHS:鍚� 鍒堕€犲晢:Fairchild Semiconductor 閭忚集椤炲瀷:CMOS 閭忚集绯诲垪:74VCX 姣忚姱鐗囩殑閫氶亾鏁�(sh霉)閲�:16 杓稿叆闆诲钩:CMOS 杓稿嚭闆诲钩:CMOS 杓稿嚭椤炲瀷:3-State 楂橀浕骞宠几鍑洪浕娴�:- 24 mA 浣庨浕骞宠几鍑洪浕娴�:24 mA 鍌虫挱寤堕伈鏅�(sh铆)闁�:6.2 ns 闆绘簮闆诲-鏈€澶�:2.7 V, 3.6 V 闆绘簮闆诲-鏈€灏�:1.65 V, 2.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TSSOP-48 灏佽:Reel
MC100EP16FDR2 鍔熻兘鎻忚堪:绺界窔鏀剁櫦(f膩)鍣� 3.3V/5V ECL Diff RoHS:鍚� 鍒堕€犲晢:Fairchild Semiconductor 閭忚集椤炲瀷:CMOS 閭忚集绯诲垪:74VCX 姣忚姱鐗囩殑閫氶亾鏁�(sh霉)閲�:16 杓稿叆闆诲钩:CMOS 杓稿嚭闆诲钩:CMOS 杓稿嚭椤炲瀷:3-State 楂橀浕骞宠几鍑洪浕娴�:- 24 mA 浣庨浕骞宠几鍑洪浕娴�:24 mA 鍌虫挱寤堕伈鏅�(sh铆)闁�:6.2 ns 闆绘簮闆诲-鏈€澶�:2.7 V, 3.6 V 闆绘簮闆诲-鏈€灏�:1.65 V, 2.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TSSOP-48 灏佽:Reel
MC100EP16FDR2G 鍔熻兘鎻忚堪:绺界窔鏀剁櫦(f膩)鍣� 3.3V/5V ECL Diff RoHS:鍚� 鍒堕€犲晢:Fairchild Semiconductor 閭忚集椤炲瀷:CMOS 閭忚集绯诲垪:74VCX 姣忚姱鐗囩殑閫氶亾鏁�(sh霉)閲�:16 杓稿叆闆诲钩:CMOS 杓稿嚭闆诲钩:CMOS 杓稿嚭椤炲瀷:3-State 楂橀浕骞宠几鍑洪浕娴�:- 24 mA 浣庨浕骞宠几鍑洪浕娴�:24 mA 鍌虫挱寤堕伈鏅�(sh铆)闁�:6.2 ns 闆绘簮闆诲-鏈€澶�:2.7 V, 3.6 V 闆绘簮闆诲-鏈€灏�:1.65 V, 2.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TSSOP-48 灏佽:Reel
MC100EP16FDT 鍔熻兘鎻忚堪:绺界窔鏀剁櫦(f膩)鍣� 3.3V/5V ECL Diff RoHS:鍚� 鍒堕€犲晢:Fairchild Semiconductor 閭忚集椤炲瀷:CMOS 閭忚集绯诲垪:74VCX 姣忚姱鐗囩殑閫氶亾鏁�(sh霉)閲�:16 杓稿叆闆诲钩:CMOS 杓稿嚭闆诲钩:CMOS 杓稿嚭椤炲瀷:3-State 楂橀浕骞宠几鍑洪浕娴�:- 24 mA 浣庨浕骞宠几鍑洪浕娴�:24 mA 鍌虫挱寤堕伈鏅�(sh铆)闁�:6.2 ns 闆绘簮闆诲-鏈€澶�:2.7 V, 3.6 V 闆绘簮闆诲-鏈€灏�:1.65 V, 2.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TSSOP-48 灏佽:Reel
MC100EP16FDTG 鍔熻兘鎻忚堪:绺界窔鏀剁櫦(f膩)鍣� 3.3V/5V ECL Diff RoHS:鍚� 鍒堕€犲晢:Fairchild Semiconductor 閭忚集椤炲瀷:CMOS 閭忚集绯诲垪:74VCX 姣忚姱鐗囩殑閫氶亾鏁�(sh霉)閲�:16 杓稿叆闆诲钩:CMOS 杓稿嚭闆诲钩:CMOS 杓稿嚭椤炲瀷:3-State 楂橀浕骞宠几鍑洪浕娴�:- 24 mA 浣庨浕骞宠几鍑洪浕娴�:24 mA 鍌虫挱寤堕伈鏅�(sh铆)闁�:6.2 ns 闆绘簮闆诲-鏈€澶�:2.7 V, 3.6 V 闆绘簮闆诲-鏈€灏�:1.65 V, 2.3 V 鏈€澶у伐浣滄韩搴�:+ 85 C 灏佽 / 绠遍珨:TSSOP-48 灏佽:Reel