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參數(shù)資料
| 型號(hào)： | MC100E016FN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit Synchronous Binary Up Counter |
| 中文描述： | 100E SERIES, SYN POSITIVE EDGE TRIGGERED 8-BIT UP BINARY COUNTER, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大小： | 161K |
| 代理商： | MC100E016FN |
MC10E016 MC100E016
MOTOROLA
ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–6
Applications Information
(continued)
E016
MSB
CLK
TC
PE
CE
E016
CLK
TC
PE
CE
E016
CLK
TC
PE
CE
EL01
EL01
EL01
CLOCK
Q0 –> Q7
PO –> P7
Q0 –> Q7
PO –> P7
Q0 –> Q7
PO –> P7
Q0 –> Q7
PO –> P7
LO
E016
LSB
CLK
TC
PE
CE
Figure 4. 32-Bit Cascaded E016 Programmable Divider
Figure 4 on the following page shows a typical block
diagram of a 32-bit divider chain. Once again to maximize the
frequency of operation EL01 OR gates were used. For lower
frequency applications a slower OR gate could replace the
EL01. Note that for a 16-bit divider the OR function feeding the
PE (program enable) input CANNOT be replaced by a wire OR
tie as the TC output of the least significant E016 must also feed
the CE input of the most significant E016. If the two TC outputs
were OR tied the cascaded count operation would not operate
properly. Because in the cascaded form the PE feedback is
external and requires external gating, the maximum frequency
of operation will be significantly less than the same operation
in a single device.
Maximizing E016 Count Frequency
The E016 device produces 9 fast transitioning single ended
outputs, thus VCC noise can become significant in situations
where all of the outputs switch simultaneously in the same
direction. This VCC noise can negatively impact the maximum
frequency of operation of the device. Since the device does
not need to have the Q outputs terminated to count properly,
it is recommended that if the outputs are not going to be used
in the rest of the system they should be left unterminated. In
addition, if only a subset of the Q outputs are used in the
system only those outputs should be terminated. Not
terminating the unused outputs will not only cut down the VCC
noise generated but will also save in total system power
dissipation. Following these guidelines will allow designers to
either be more aggressive in their designs or provide them
with an extra margin to the published data book specifications.
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PDF描述 |
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| MC10E016 | 8-BIT SYNCHRONOUS BINARY UP COUNTER |
| MC10E016FN | 8-Bit Synchronous Binary Up Counter |
| MC100E101FN | Quad 4-Input OR/NOR Gate |
| MC10E101 | QUAD 4-INPUT OR/NOR GATE |
| MC10E101FN | Quad 4-Input OR/NOR Gate |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100E016FNG | 功能描述:計(jì)數(shù)器移位寄存器 5V ECL 8-Bit Binary Up Synchronous RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100E016FNR2 | 功能描述:計(jì)數(shù)器移位寄存器 5V ECL 8-Bit Binary RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100E016FNR2G | 功能描述:計(jì)數(shù)器移位寄存器 5V ECL 8-Bit Binary Up Synchronous RoHS:否 制造商:Texas Instruments 計(jì)數(shù)器類型: 計(jì)數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時(shí)間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100E101 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:QUAD 4-INPUT OR/NOR GATE |
| MC100E101FN | 功能描述:邏輯門(mén) 5V ECL Quad 4-Input RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時(shí)間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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