參數(shù)資料
型號: MC-4R128FKK8K
廠商: Elpida Memory, Inc.
英文描述: 128MB 32-bit Direct Rambus DRAM RIMM Module
中文描述: 128MB的32位直接Rambus的內(nèi)存RIMM的模塊
文件頁數(shù): 9/13頁
文件大?。?/td> 88K
代理商: MC-4R128FKK8K
MC-4R128FKK8K
Preliminary Data Sheet E0252N10 (Ver. 1.0)
9
AC Electrical Specifications
Symbol
Parameter and Conditions
Note1
MIN.
TYP.
MAX.
Unit
ZL
Module Impedance of RSL signals
25.2
28.0
30.8
ZUL
CMOS
Module Impedance of SCK and CMD signals
23.8
28.0
32.2
TPD
Average clock delay from finger to finger of all RSL clock
nets (CTM, CTMN,CFM, and CFMN)
Propagation delay variation of RSL signals with respect to
TPD
Propagation delay variation of SCK signal with respect to
an average clock delay
Propagation delay variation of CMD signal with respect to
SCK signal
0.89
ns
TPD
21
+21
ps
TPD-CMOS
250
+250
ps
TPD- SCK,CMD
200
+200
ps
V
α
/VIN
Attenuation Limit
16.0
%
VXF/VIN
Forward crosstalk coefficient
(300ps input rise time 20% - 80%)
Backward crosstalk coefficient
(300ps input rise time 20% - 80%)
4.0
%
VXB/VIN
2.0
%
RDC
DC Resistance Limit
0.8
Notes 1. Specifications apply per channel.
2. TPD or Average clock delay is defined as the average delay from finger to finger of all RSL clock nets
(CTM, CTMN, CFM, and CFMN).
3. If the RIMM module meets the following specification, then it is compliant to the specification.
If the RIMM module does not meet these specifications, then the specification can be adjusted by the
“Adjusted
TPD Specification” table.
Adjusted
TPD Specification
Absolute
Symbol
Parameter and conditions
Adjusted MIN./MAX.
MIN.
MAX.
Unit
TPD
Propagation delay variation of RSL signals with
respect to TPD
Note N = Number of RDRAM devices installed on the RIMM module.
Z0 = delta Z0% = (MAX. Z0 - MIN. Z0) / (MIN. Z0)
(MAX. Z0 and MIN. Z0 are obtained from the loaded (high impedance) impedance coupons of all RSL layers
on the module.)
+/
[17+(18*N*
Z0)]
Note
30
30
ps
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