- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄383557 > MC-4R128FKK6K (Elpida Memory, Inc.) 128MB 32-bit Direct Rambus DRAM RIMM Module PDF資料下載
參數(shù)資料
| 型號： | MC-4R128FKK6K |
| 廠商： | Elpida Memory, Inc. |
| 英文描述： | 128MB 32-bit Direct Rambus DRAM RIMM Module |
| 中文描述： | 128MB的32位直接Rambus的內(nèi)存RIMM的模塊 |
| 文件頁數(shù)： | 5/13頁 |
| 文件大?。?/td> | 88K |
| 代理商： | MC-4R128FKK6K |
MC-4R128FKK6K
Preliminary Data Sheet E0269N10 (Ver. 1.0)
5
Signal
Module
connector pads
I/O
Type
Description
Row bus. 3-bit bus containing control and address information
for row accesses. Connects to right RDRAM device on "Thru"
Channel.
Serial Clock input. Clock source used to read from and write
to "Thru" Channel RDRAM control registers. Connects to left
RDRAM device on "Thru" Channel.
Serial Clock input. Clock source used to read from and write
to "Thru" Channel RDRAM control registers. Connects to right
RDRAM device on "Thru" Channel.
"Thru" Channel Serial I/O for reading from and writing to the
control registers. Attaches to SIO0 of right RDRAM device on
"Thru" Channel.
"Thru" Channel Serial I/O for reading from and writing to the
control registers. Attaches to SIO1 of left RDRAM device on
"Thru" Channel.
Clock from master. Connects to right RDRAM device on
"Term" Channel. Interface clock used for receiving RSL
signals from the controller. Positive polarity.
Clock from master. Connects to right RDRAM device on
"Term" Channel. Interface clock used for receiving RSL
signals from the controller. Negative polarity.
Serial Command Input used to read from and write to the
control registers. Also used for power management.
Connects to right RDRAM device on "Term" Channel.
"Term" Channel Column bus. 5-bit bus containing control and
address information for column accesses. Connects to right
RDRAM device on "Term" Channel.
Clock To Master. Connects to left RDRAM device on "Term"
Channel. Interface clock used for transmitting RSL signals to
the controller. Positive polarity.
Clock To Master. Connects to right RDRAM device on "Term"
Channel. Interface clock used for transmitting RSL signals to
the controller. Positive polarity.
Clock To Master. Connects to left RDRAM device on "Term"
Channel. Interface clock used for transmitting RSL signals to
the controller. Negative polarity.
Clock To Master. Connects to right RDRAM device on "Term"
Channel. Interface clock used for transmitting RSL signals to
the controller. Negative polarity.
"Term" Channel Data bus A. A 9-bit bus carrying a byte of
read or write data between the controller and RDRAM devices
on “Term” Channel. Connects to right RDRAM device on
"Term" Channel. DQA8_TERM is non-functional on modules.
"Term" Channel Data bus B. A 9-bit bus carrying a byte of
read or write data between the controller and RDRAM devices
on “Term” Channel. Connects to right RDRAM device on
"Term" Channel. DQB8_TERM is non-functional on modules.
"Term" Channel Row bus. 3-bit bus containing control and
address information for row accesses. Connects to right
RDRAM device on "Term" Channel.
Serial Clock input. Clock source used to read from and write
to "Term" Channel RDRAM control registers. Connects to
right RDRAM device on "Term" Channel.
"Term" Channel Serial I/O for reading from and writing to the
control registers. Attaches to SIO0 of left RDRAM device on
"Term" Channel.
"Term" Channel Termination voltage.
ROW2_THRU_R..
ROW0_THRU_R
A52, B50, A50
I
RSL
SCK_THRU_L
A2
I
VCMOS
SCK_THRU_R
A71
I
VCMOS
SIN_THRU
B34
I/O
VCMOS
SOUT_THRU
A34
I/O
VCMOS
CFM_TERM
B103
I
RSL
CFMN_TERM
B101
I
RSL
CMD_TERM
A115
I
VCMOS
COL4_TERM..
COL0_TERM
B97, A97, B95, A95,
B93
I
RSL
CTM_TERM_L
B73
I
RSL
CTM_TERM_R
A103
I
RSL
CTMN_TERM_L
B71
I
RSL
CTMN_TERM_R
A105
I
RSL
DQA8_TERM..
DQA0_TERM
B113, A113, B111,
A111, B109, A109,
B107, A107, B105
I/O
RSL
DQB8_TERM..
DQB0_TERM
A85, B85, A87, B87,
A89, B89, A91, B91,
A93
I/O
RSL
ROW2_TERM..
ROW0_TERM
A101, B99, A99
I
RSL
SCK_TERM
B115
I
VCMOS
SIN_TERM
B83
I/O
VCMOS
VTERM
A60, B60, A61, B61
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC-4R128FKK6K-840 | 128MB 32-bit Direct Rambus DRAM RIMM Module |
| MC-4R128FKK8K | 128MB 32-bit Direct Rambus DRAM RIMM Module |
| MC-4R128FKK8K-840 | 128MB 32-bit Direct Rambus DRAM RIMM Module |
| MC-4R192CPE6C-653 | Direct Rambus DRAM RIMM Module 192M-BYTE 96M-WORD x 16-BIT |
| MC-4R192CPE6C-745 | Direct Rambus DRAM RIMM Module 192M-BYTE 96M-WORD x 16-BIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC-4R128FKK6K-840 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128MB 32-bit Direct Rambus DRAM RIMM Module |
| MC-4R128FKK8K | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128MB 32-bit Direct Rambus DRAM RIMM Module |
| MC-4R128FKK8K-840 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128MB 32-bit Direct Rambus DRAM RIMM Module |
| MC-4R192CPE6C | 制造商:NEC 制造商全稱:NEC 功能描述:Direct Rambus DRAM RIMM Module 192M-BYTE 96M-WORD x 16-BIT |
| MC-4R192CPE6C-653 | 制造商:NEC 制造商全稱:NEC 功能描述:Direct Rambus DRAM RIMM Module 192M-BYTE 96M-WORD x 16-BIT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。