- 您現在的位置：買賣IC網 > PDF目錄383556 > MC-45D32CD641 (NEC Corp.) 32 M-WORD BY 64-BIT DDR SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE PDF資料下載
參數資料
| 型號： | MC-45D32CD641 |
| 廠商： | NEC Corp. |
| 英文描述： | 32 M-WORD BY 64-BIT DDR SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| 中文描述： | 32的M - Word的64位DDR同步動態(tài)RAM模塊無緩沖型 |
| 文件頁數： | 8/16頁 |
| 文件大小： | 259K |
| 代理商： | MC-45D32CD641 |
Preliminary Data Sheet M14900EJ1V0DS00
8
MC-45D32CC721
Synchronous Characteristics
Parameter
Symbol
-C75 (PC266B)
-C80 (PC200)
Unit
Note
MIN.
MAX.
MIN.
MAX.
Clock cycle time
CL = 2.5
t
CK
7.5
15
8
15
ns
CL = 2
10
15
10
15
CLK high-level width
t
CH
0.45
0.55
0.45
0.55
t
CK
CLK low-level width
t
CL
0.45
0.55
0.45
0.55
t
CK
DQ output access time from CLK, /CLK
t
AC
–0.75
0.75
–0.8
0.8
ns
DQS output access time from CLK, /CLK
t
DQSCK
–0.75
0.75
–0.8
0.8
ns
DQS-DQ skew (for DQS and associated DQ
signals)
DQS-DQ skew (for DQS and all DQ signals)
t
DQSQ
–0.5
0.5
–0.6
0.6
ns
t
DQSQA
–0.5
0.5
–0.6
0.6
ns
Data out low-impedance time from CLK, /CLK
t
LZ
–0.75
0.75
–0.8
0.8
ns
Data out high-impedance time from CLK, /CLK
t
HZ
–0.75
0.75
–0.8
0.8
ns
Half clock period
t
HP
t
CH
, t
CL
t
CH
, t
CL
ns
DQS read preamble
t
RPRE
0.9
1.1
0.9
1.1
t
CK
DQS read postamble
t
RPST
0.4
0.6
0.4
0.6
t
CK
DQ-DQS hold, DQS to first DQ to go non-valid,
per access
DQ and DM input setup time
t
QH
t
HP
– 0.75
t
HP
– 1
ns
t
DS
0.5
0.6
ns
DQ and DM input hold time
t
DH
0.5
0.6
ns
DQ and DM input pulse width (for each input)
t
DIPW
1.75
2
ns
DQS write preamble setup time
t
WPRES
0
0
ns
DQS write preamble
t
WPRE
0.25
0.25
t
CK
Write postamble
t
WPST
0.4
0.6
0.4
0.6
t
CK
Write command to first DQS latching transition
t
DQSS
0.75
1.25
0.75
1.25
t
CK
DQS input high pulse width
t
DQSH
0.35
0.35
t
CK
DQS input low pulse width
t
DQSL
0.35
0.35
t
CK
DQS falling edge to CLK setup time
t
DSS
0.2
0.2
t
CK
DQS falling edge hold time from CLK
t
DSH
0.2
0.2
t
CK
Address and control input setup time
t
IS
0.9
1.1
ns
Address and control input hold time
t
IH
0.9
1.1
ns
Address and control input pulse width
t
IPW
2.2
2.5
ns
Internal write to read command delay
t
WTR
1
1
t
CK
Remark
These specifications are applied to the monolithic device.
相關PDF資料 |
PDF描述 |
|---|---|
| MC-45V16AD641KF-A10 | 16M-WORD BY 64-BIT VirtualChannel SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-45V16AD641KF-A75 | 16M-WORD BY 64-BIT VirtualChannel SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-45V16AD641 | 16M-WORD BY 64-BIT VirtualChannel SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-45V16AD641EF-A10 | 16M-WORD BY 64-BIT VirtualChannel SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-45V16AD641EF-A75 | 16M-WORD BY 64-BIT VirtualChannel SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC-45D32CD641KFA-C75 | 制造商:NEC 制造商全稱:NEC 功能描述:32 M-WORD BY 64-BIT DDR SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-45D32CD641KFA-C80 | 制造商:NEC 制造商全稱:NEC 功能描述:32 M-WORD BY 64-BIT DDR SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
| MC-45D32DA721 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:32 M-WORD BY 72-BIT DDR SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE |
| MC-45D32DA721KFA-C75 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:32 M-WORD BY 72-BIT DDR SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE |
| MC-45D32DA721KFA-C80 | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:32 M-WORD BY 72-BIT DDR SYNCHRONOUS DYNAMIC RAM MODULE REGISTERED TYPE |
發(fā)布緊急采購，3分鐘左右您將得到回復。