參數(shù)資料
型號: MB9BF506NAPMC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP100
封裝: 14 X 14 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù): 97/108頁
文件大小: 1298K
代理商: MB9BF506NAPMC
89
FUJITSU SEMICONDUCTOR CONFIDENTIAL
r6.0
MB9B500A Series
(Continued)
*4: When 12bit A/D converter is used at AVcc<4.5V, there is a limitation as follows.
It canot be used at minimum compare clock cycle when HCLK is set over 54MHz, because maximum
compare clock division ratio is “9”(please refer FM3 PERIPHERAL MANUALchapter “12bit A/D
converter”),
Please set the HCLK frequency under 54MHz.
(Equation 1) Ts
≥ ( Rin + Rext ) × Cin × 9
Ts
: Sampling time
Rin : input resistance of A/D = 0.93k
4.5 ≤ AVCC ≤ 5.5
input resistance of A/D = 2.04k
2.7 ≤ AVCC < 4.5
Cin : input capacity of A/D = 14.5pF
2.7 ≤ AVCC ≤ 5.5
Rext : Output impedance of external circuit
(Equation 2) Tc = Tcck × 14
Tc
: Compare time
Tcck : Comrare clock cycle
Analog signal
source
AN0 to AN15
Analog input pin
comparator
Rext
Rin
Cin
DS706-00021-1v0-E
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