參數(shù)資料
型號： MB9AF312NPF
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 0.65 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 72/114頁
文件大?。?/td> 1357K
代理商： MB9AF312NPF
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
60
13.2
Register Description
13.2.1 EICRA – External Interrupt Control Register A
The external interrupt control register A contains control bits for interrupt sense control.
Bit 7:4 – Reserved
These bits are unused bits in the Atmel ATmega48PA/88PA/168PA, and will always read as zero.
Bit 3, 2 – ISC11, ISC10: Interrupt Sense Control 1 Bit 1 and Bit 0
The external interrupt 1 is activated by the external pin INT1 if the SREG I-flag and the corresponding interrupt mask are set.
The level and edges on the external INT1 pin that activate the interrupt are defined in Table 13-1. The value on the INT1 pin
is sampled before detecting edges. If edge or toggle interrupt is selected, pulses that last longer than one clock period will
generate an interrupt. Shorter pulses are not guaranteed to generate an interrupt. If low level interrupt is selected, the low
level must be held until the completion of the currently executing instruction to generate an interrupt.
Bit 1, 0 – ISC01, ISC00: Interrupt Sense Control 0 Bit 1 and Bit 0
The external interrupt 0 is activated by the external pin INT0 if the SREG I-flag and the corresponding interrupt mask are set.
The level and edges on the external INT0 pin that activate the interrupt are defined in Table 13-2. The value on the INT0 pin
is sampled before detecting edges. If edge or toggle interrupt is selected, pulses that last longer than one clock period will
generate an interrupt. Shorter pulses are not guaranteed to generate an interrupt. If low level interrupt is selected, the low
level must be held until the completion of the currently executing instruction to generate an interrupt.
Bit
765
43210
–
ISC11
ISC10
ISC01
ISC00
EICRA
Read/Write
R
R/W
Initial Value
000
00000
Table 13-1. Interrupt 1 Sense Control
ISC11
ISC10
Description
0
The low level of INT1 generates an interrupt request.
0
1
Any logical change on INT1 generates an interrupt request.
1
0
The falling edge of INT1 generates an interrupt request.
1
The rising edge of INT1 generates an interrupt request.
Table 13-2. Interrupt 0 Sense Control
ISC01
ISC00
Description
0
The low level of INT0 generates an interrupt request.
0
1
Any logical change on INT0 generates an interrupt request.
1
0
The falling edge of INT0 generates an interrupt request.
1
The rising edge of INT0 generates an interrupt request.
相關(guān)PDF資料
PDF描述
MB9AF312LPMC1 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP64
MB9AF312MPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP80
MB9AF312LPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP64
MB9AF311NPMC 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100
MB9AF316NPMC RISC MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB9AF314LAPMC1-G-JNE2 制造商:FUJITSU 功能描述:
MB9AF314LAPMC-G-JNE2 制造商:Fujitsu 功能描述:Bulk
MB9AF314LAQN-G-AVE2 功能描述:ARM? Cortex?-M3 FM3 MB9A310A Microcontroller IC 32-Bit 40MHz 256KB (256K x 8) FLASH 64-QFN Exposed Pad (9x9) 制造商:cypress semiconductor corp 系列:FM3 MB9A310A 包裝:托盤 零件狀態(tài):有效 核心處理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:40MHz 連接性:CSIO，I2C，LIN，UART/USART，USB 外設(shè):DMA，LVD，POR，PWM，WDT I/O 數(shù):51 程序存儲容量:256KB（256K x 8） 程序存儲器類型:閃存 EEPROM 容量:- RAM 容量:32K x 8 電壓 - 電源（Vcc/Vdd）:2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 9x12b 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 105°C（TA） 封裝/外殼:64-VFQFN 裸露焊盤 供應(yīng)商器件封裝:64-QFN 裸露焊盤（9x9） 標(biāo)準(zhǔn)包裝:260
MB9AF314LPMC1-ESE1 制造商:FUJITSU 功能描述:
MB9AF314LPMC1-GE1 制造商:FUJITSU 功能描述:
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*