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參數(shù)資料
| 型號(hào)： | MB9AF311NPF |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, FLASH, 40 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 0.65 MM PITCH, PLASTIC, LQFP-100 |
| 文件頁(yè)數(shù)： | 51/114頁(yè) |
| 文件大?。?/td> | 1357K |
| 代理商： | MB9AF311NPF |
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41
ATmega48PA/88PA/168PA [DATASHEET]
9223F–AVR–04/14
11.
System Control and Reset
11.1
Resetting the AVR
During reset, all I/O registers are set to their initial values, and the program starts execution from the reset vector. For Atmel
ATmega168PA the instruction placed at the reset vector must be a JMP – absolute jump – instruction to the reset handling
routine. For the Atmel ATmega48PA and Atmel ATmega88PA, the instruction placed at the reset vector must be an RJMP –
relative jump – instruction to the reset handling routine. If the program never enables an interrupt source, the interrupt
vectors are not used, and regular program code can be placed at these locations. This is also the case if the reset vector is
in the application section while the interrupt vectors are in the boot section or vice versa (Atmel ATmega88PA/168PA only).
The circuit diagram in Figure 11-1 on page 42 shows the reset logic. Table 29-5 on page 272 defines the electrical
parameters of the reset circuitry.
The I/O ports of the AVR are immediately reset to their initial state when a reset source goes active. This does not require
any clock source to be running.
After all reset sources have gone inactive, a delay counter is invoked, stretching the internal reset. This allows the power to
reach a stable level before normal operation starts. The time-out period of the delay counter is defined by the user through
the SUT and CKSEL fuses. The different selections for the delay period are presented in
11.2
Reset Sources
The Atmel ATmega48PA/88PA/168PA has four sources of reset:
●
Power-on reset. The MCU is reset when the supply voltage is below the power-on reset threshold (VPOT).
●
External reset. The MCU is reset when a low level is present on the RESET pin for longer than the minimum pulse
length.
●
Watchdog system reset. The MCU is reset when the watchdog timer period expires and the watchdog system reset
mode is enabled.
●
Brown-out reset. The MCU is reset when the supply voltage VCC is below the brown-out reset threshold (VBOT) and the
brown-out detector is enabled.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| MB9AF312KPMC1-G-JNE2 | 功能描述:ARM? Cortex?-M3 FM3 MB9A310K Microcontroller IC 32-Bit 40MHz 160KB (160K x 8) FLASH 52-LQFP (10x10) 制造商:cypress semiconductor corp 系列:FM3 MB9A310K 包裝:托盤 零件狀態(tài):有效 核心處理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:40MHz 連接性:CSIO，I2C，LIN，UART/USART，USB 外設(shè):DMA，LVD，POR，PWM，WDT I/O 數(shù):36 程序存儲(chǔ)容量:160KB（160K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 容量:- RAM 容量:16K x 8 電壓 - 電源（Vcc/Vdd）:2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x12b 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 105°C（TA） 封裝/外殼:52-LQFP 供應(yīng)商器件封裝:52-LQFP（10x10） 標(biāo)準(zhǔn)包裝:160 |
| MB9AF312KPMC-ES-E1 | 制造商:FUJITSU 功能描述: |
| MB9AF312KPMC-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB9AF312KPMC-G-JNE2 | 功能描述:ARM? Cortex?-M3 FM3 MB9A310K Microcontroller IC 32-Bit 40MHz 160KB (160K x 8) FLASH 48-LQFP (7x7) 制造商:cypress semiconductor corp 系列:FM3 MB9A310K 包裝:托盤 零件狀態(tài):有效 核心處理器:ARM? Cortex?-M3 核心尺寸:32-位 速度:40MHz 連接性:CSIO，I2C，LIN，UART/USART，USB 外設(shè):DMA，LVD，POR，PWM，WDT I/O 數(shù):36 程序存儲(chǔ)容量:160KB（160K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 容量:- RAM 容量:16K x 8 電壓 - 電源（Vcc/Vdd）:2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x12b 振蕩器類型:內(nèi)部 工作溫度:-40°C ~ 105°C（TA） 封裝/外殼:48-LQFP 供應(yīng)商器件封裝:48-LQFP（7x7） 標(biāo)準(zhǔn)包裝:250 |
| MB9AF312KQN-ES-AWE2 | 制造商:FUJITSU 功能描述: |
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